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參數(shù)資料
| 型號： | LTC2223IUK#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 16/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT 80MSPS SAMPLE 48QFN |
| 標準包裝： | 2,000 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 80M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 406mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-QFN-EP（7x7） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個單端，雙極; 1 個差分，雙極 |
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LTC2222/LTC2223
23
22223fb
Data Format
The LTC2222/LTC2223 parallel digital output can be selected
for offset binary or 2’s complement format. The format is
selected with the MODE pin. Connecting MODE to GND
or 1/3VDD selects offset binary output format. Connecting
MODE to 2/3VDD or VDD selects 2’s complement output
format. An external resistor divider can be used to set the
1/3VDD or 2/3VDD logic values. Table 2 shows the logic
states for the MODE pin.
Table 2. MODE Pin Function
MODE PIN
OUTPUT FORMAT
CLOCK DUTY
CYCLE STABLIZER
0
Offset Binary
Off
1/3VDD
Offset Binary
On
2/3VDD
2’s Complement
On
VDD
2’s Complement
Off
Overow Bit
When OF outputs a logic high the converter is either over-
ranged or underranged.
Output Clock
The ADC has a delayed version of the ENC+ input available
as a digital output, CLKOUT. The CLKOUT pin can be used
to synchronize the converter data to the digital system.
This is necessary when using a sinusoidal encode. Data
will be updated just after CLKOUT rises and can be latched
on the falling edge of CLKOUT.
Output Driver Power
Separate output power and ground pins allow the output
drivers to be isolated from the analog circuitry. The power
supply for the digital output buffers, OVDD, should be tied
to the same power supply as for the logic being driven.
For example if the converter is driving a DSP powered
by a 1.8V supply then OVDD should be tied to that same
1.8V supply.
OVDD can be powered with any voltage up to 3.6V. OGND
can be powered with any voltage from GND up to 1V and
must be less than OVDD. The logic outputs will swing
between OGND and OVDD.
Output Enable
The outputs may be disabled with the output enable pin,
OE. OE high disables all data outputs including OF and
CLKOUT. The data access and bus relinquish times are too
slow to allow the outputs to be enabled and disabled during
full speed operation. The output Hi-Z state is intended for
use during long periods of inactivity.
Sleep and Nap Modes
The converter may be placed in shutdown or nap modes
to conserve power. Connecting SHDN to GND results in
normal operation. Connecting SHDN to VDD and OE to VDD
results in sleep mode, which powers down all circuitry
including the reference and typically dissipates 1mW. When
exiting sleep mode it will take milliseconds for the output
data to become valid because the reference capacitors
have to recharge and stabilize. Connecting SHDN to VDD
and OE to GND results in nap mode, which typically dis-
sipates 35mW. In nap mode, the on-chip reference circuit
is kept on, so that recovery from nap mode is faster than
that from sleep mode, typically taking 100 clock cycles. In
both sleep and nap mode all digital outputs are disabled
and enter the Hi-Z state.
GROUNDING AND BYPASSING
The LTC2222/LTC2223 requires a printed circuit board with
a clean unbroken ground plane. A multilayer board with
an internal ground plane is recommended. Layout for the
printed circuit board should ensure that digital and analog
signal lines are separated as much as possible. In particular,
care should be taken not to run any digital track alongside
an analog signal track or underneath the ADC.
APPLICATIONS INFORMATION
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| LTC2223UK | 制造商:LINER 制造商全稱:Linear Technology 功能描述:12-Bit,105Msps/80Msps ADCs |
| LTC2224 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:12-Bit, 135Msps ADC |
| LTC2224CUK | 功能描述:IC ADC 12BIT 135MSPS SAMPL 48QFN RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| LTC2224CUK#PBF | 功能描述:IC ADC 12BIT 135MSPS SAMPL 48QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| LTC2224CUK#TR | 功能描述:IC ADC 12BIT 135MSPS SAMPL 48QFN RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
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