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參數(shù)資料
| 型號： | LTC2215IUP#TR |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64 |
| 封裝： | 9 X 9 MM, PLASTIC, MO-220WNJR-5, QFN-64 |
| 文件頁數(shù)： | 22/36頁 |
| 文件大小： | 1703K |
| 代理商： | LTC2215IUP#TR |
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LTC2216/LTC2215
29
22165f
Figure 15. Descrambling a Scrambled Digital Output
D1
D0
D2
D14
D15
PC BOARD
FPGA
CLKOUT
OF
D15 D0
D14 D0
D2 D0
D1 D0
D0
22165 F15
LTC2216/
LTC2215
Internal Dither
The LTC2216/LTC2215 is a 16-bit ADC with a very linear
transfer function; however, at low input levels even slight
imperfections in the transfer function will result in unwanted
tones. Small errors in the transfer function are usually a
result of ADC element mismatches. An optional internal
dither mode can be enabled to randomize the input location
on the ADC transfer curve, resulting in improved SFDR
for low signal levels.
As shown in Figure 16, the output of the sample-and-hold
amplier is summed with the output of a dither DAC. The
dither DAC is driven by a long sequence pseudo-random
number generator; the random number fed to the dither DAC
is also subtracted from the ADC result. If the dither DAC
is precisely calibrated to the ADC, very little of the dither
signal will be seen at the output. The dither signal that does
leak through will appear as white noise. The dither DAC is
calibrated to result in typically less than 0.5dB elevation
in the noise oor of the ADC, as compared to the noise
oor with dither off when a suitable input termination is
provided (see Demo Board schematic DC996B).
Figure 16. Functional Equivalent Block Diagram of Internal Dither Circuit
+–
AIN–
AIN+
S/H
AMP
DIGITAL
SUMMATION
OUTPUT
DRIVERS
MULTIBIT DEEP
PSEUDO-RANDOM
NUMBER
GENERATOR
16-BIT
PIPELINED
ADC CORE
PRECISION
DAC
CLOCK/DUTY
CYCLE
CONTROL
CLKOUT
OF
D15
D0
ENC
DITHER ENABLE
HIGH = DITHER ON
LOW = DITHER OFF
DITH
ENC
ANALOG
INPUT
22165 F16
LTC2216/LTC2215
APPLICATIONS INFORMATION
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| LTC2217IUP | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64 |
| LTC2217IUP#TR | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64 |
| LTC2217CUP | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64 |
| LTC2217CUP#TR | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64 |
| LTC2226HLU#PBF | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP32 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2215IUP-TRPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 80Msps/65Msps Low Noise ADC |
| LTC2215UP | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 80Msps/65Msps Low Noise ADC |
| LTC2216 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 20Msps Low Power ADC |
| LTC2216CUP | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 80Msps/65Msps Low Noise ADC |
| LTC2216CUP#PBF | 制造商:Linear Technology 功能描述:ADC Single Pipelined 80Msps 16-bit Parallel/LVDS 64-Pin QFN EP 制造商:Linear Technology 功能描述:IC ADC 16BIT 80MSPS 64-QFN |
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