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參數(shù)資料
| 型號： | LTC2206CUK-14#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 15/32頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 14BIT 80MSPS 48-QFN |
| 標準包裝： | 52 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 80M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉換器數(shù)目： | 1 |
| 功率耗散（最大）： | 875mW |
| 電壓電源： | 單電源 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-WFQFN 裸露焊盤 |
| 供應商設備封裝： | 48-QFN-EP（7x7） |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 1 個差分 |
| 配用： | DC890B-ND - BOARD USB DATA COLLECTION |
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LTC2207-14/LTC2206-14
22
220714614fc
Maximum and Minimum Encode Rates
The maximum encode rate for the LTC2207-14 is 105Msps.
The maximum encode rate for the LTC2206-14 is 80Msps.
For the ADC to operate properly the encode signal should
have a 50% (±5%) duty cycle. Each half cycle must be at
least 4.52ns for the LTC2207-14 internal circuitry to have
enough settling time for proper operation. For the LTC2206-
14, each half cycle must be at least 5.94ns. Achieving a
precise 50% duty cycle is easy with differential sinusoidal
drive using a transformer or using symmetric differential
logic such as PECL or LVDS. When using a single-ended
ENCODE signal asymmetric rise and fall times can result
in duty cycles that are far from 50%.
An optional clock duty cycle stabilizer can be used if the
input clock does not have a 50% duty cycle. This circuit
uses the rising edge of ENC pin to sample the analog input.
The falling edge of ENC is ignored and an internal falling
edge is generated by a phase-locked loop. The input clock
duty cycle can vary from 30% to 70% and the clock duty
cycle stabilizer will maintain a constant 50% internal duty
cycle. If the clock is turned off for a long period of time,
the duty cycle stabilizer circuit will require one hundred
clock cycles for the PLL to lock onto the input clock. To
use the clock duty cycle stabilizer, the MODE pin must be
connected to 1/3VDD or 2/3VDD using external resistors.
The lower limit of the LTC2207-14/LTC2206-14 sample rate
is determined by droop of the sample and hold circuits. The
pipelined architecture of this ADC relies on storing analog
signals on small valued capacitors. Junction leakage will
discharge the capacitors. The specied minimum operating
frequency for the LTC2207-14/LTC2206-14 is 1Msps.
Driving the Encode Inputs
The noise performance of the LTC2207-14/LTC2206-14 can
depend on the encode signal quality as much as on the
analog input. The encode inputs are intended to be driven
differentially, primarily for noise immunity from common
mode noise sources. Each input is biased through a 6k
resistor to a 1.6V bias. The bias resistors set the DC oper-
ating point for transformer coupled drive circuits and can
set the logic threshold for single-ended drive circuits.
Any noise present on the encode signal will result in ad-
ditional aperture jitter that will be RMS summed with the
inherent ADC aperture jitter.
In applications where jitter is critical (high input frequen-
cies), take the following into consideration:
1. Differential drive should be used.
2. Use as large an amplitude possible. If using trans-
former coupling, use a higher turns ratio to increase the
amplitude.
3. If the ADC is clocked with a xed frequency sinusoidal
signal, lter the encode signal to reduce wideband
noise.
4. Balance the capacitance and series resistance at both
encode inputs such that any coupled noise will appear
at both inputs as common mode noise.
to 3V. Each input may be driven from ground to VDD for
single-ended drive.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2206IUK | 制造商:Linear Technology 功能描述:Single ADC Pipelined 80Msps 16-bit Parallel 48-Pin QFN EP |
| LTC2206IUK#PBF | 制造商:Linear Technology 功能描述:ADC Single Pipelined 80Msps 16-bit Parallel 48-Pin QFN EP 制造商:Linear Technology 功能描述:Single ADC Pipelined 80Msps 16-bit Parallel 48-Pin QFN EP 制造商:Linear Technology 功能描述:IC ADC 16-BIT 80MSPS 48-QFN 制造商:Linear Technology 功能描述:MS-ADC/High Speed, 16-bit, 80Msps ADC 制造商:Linear Technology 功能描述:IC, ADC, 16BIT, 80MSPS, QFN-48, Resolution (Bits):16bit, Sampling Rate:80MSPS, Supply Voltage Type:Single, Supply Voltage Min:3.135V, Supply Voltage Max:3.465V, Supply Current:220mA, Digital IC Case Style:QFN, No. of Pins:48 , RoHS Compliant: Yes |
| LTC2206IUK#TRPBF | 制造商:Linear Technology 功能描述:ADC Single Pipelined 80Msps 16-bit Parallel 48-Pin QFN EP T/R 制造商:Linear Technology 功能描述:IC ADC 16-BIT 80MSPS 48-QFN |
| LTC2206IUK-14 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:14-Bit, 105Msps/80Msps ADCs |
| LTC2206IUK-14#PBF | 功能描述:IC ADC 14BIT 80MSPS 48-QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
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