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參數(shù)資料
| 型號： | LTC2204CUK#PBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 16-Bit, 40Msps ADC; Package: QFN; No of Pins: 48; Temperature Range: 0°C to +70°C |
| 中文描述： | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC48 |
| 封裝： | 7 X 7 MM, LEAD FREE, PLASTIC, MO-220WKKD-2, QFN-48 |
| 文件頁數(shù)： | 13/36頁 |
| 文件大?。?/td> | 1367K |
| 代理商： | LTC2204CUK#PBF |
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LTC2205/LTC2204
20
22054fc
CONVERTER OPERATION
The LTC2205/LTC2204 are CMOS pipelined multistep
converters with a front-end PGA. As shown in Figure 1, the
converter has ve pipelined ADC stages; a sampled analog
inputwillresultinadigitizedvaluesevencycleslater(seethe
Timing Diagram section). The analog input is differential for
improved common mode noise immunity and to maximize
the input range. Additionally, the differential input drive
will reduce even order harmonics of the sample and hold
circuit. The encode input is also differential for improved
common mode noise immunity.
The LTC2205/LTC2204 have two phases of operation,
determined by the state of the differential ENC+/ENC– input
pins. For brevity, the text will refer to ENC+ greater
than ENC– as ENC high and ENC+ less than ENC– as
ENC low.
Each pipelined stage shown in Figure 1 contains an
ADC, a reconstruction DAC and a residue amplier. In
operation, the ADC quantizes the input to the stage, and
the quantized value is subtracted from the input by the
DAC to produce a residue. The residue is amplied and
output by the residue amplier. Successive stages operate
out of phase so that when odd stages are outputting
their residue, the even stages are acquiring that residue
and vice versa.
When ENC is low, the analog input is sampled differentially
directly onto the input sample-and-hold capacitors, inside
the “input S/H” shown in the block diagram. At the instant
that ENC transitions from low to high, the voltage on the
sample capacitors is held. While ENC is high, the held
input voltage is buffered by the S/H amplier which drives
the rst pipelined ADC stage. The rst stage acquires
the output of the S/H amplier during the high phase of
ENC. When ENC goes back low, the rst stage produces
its residue which is acquired by the second stage. At
the same time, the input S/H goes back to acquiring the
analog input. When ENC goes high, the second stage
produces its residue which is acquired by the third stage.
An identical process is repeated for the third and fourth
stages, resulting in a fourth stage residue that is sent to
the fth stage for nal evaluation.
Each ADC stage following the rst has additional range to
accommodate ash and amplier offset errors. Results
from all of the ADC stages are digitally delayed such that
the results can be properly combined in the correction
logic before being sent to the output buffer.
Figure 2. Equivalent Input Circuit
CSAMPLE
4.9pF
VDD
LTC2005/LTC2004
AIN+
22054 F02
CSAMPLE
4.9pF
VDD
AIN–
ENC–
ENC+
1.6V
6k
1.6V
6k
CPARASITIC
1.8pF
RPARASITIC
3Ω
RON
20Ω
RON
20Ω
RPARASITIC
3Ω
CPARASITIC
1.8pF
APPLICATIONS INFORMATION
相關PDF資料 |
PDF描述 |
|---|---|
| LTC2204CUK#TRPBF | 16-Bit, 40Msps ADC; Package: QFN; No of Pins: 48; Temperature Range: 0°C to +70°C |
| LTC2204IUK#PBF | 16-Bit, 40Msps ADC; Package: QFN; No of Pins: 48; Temperature Range: -40°C to +85°C |
| LTC2204IUK#TRPBF | 16-Bit, 40Msps ADC; Package: QFN; No of Pins: 48; Temperature Range: -40°C to +85°C |
| LTC2205CUK#PBF | 16-Bit, 65Msps ADC; Package: QFN; No of Pins: 48; Temperature Range: 0°C to +70°C |
| LTC2205CUK#TRPBF | 16-Bit, 65Msps ADC; Package: QFN; No of Pins: 48; Temperature Range: 0°C to +70°C |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2204CUK-TR | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 65Msps/40Msps |
| LTC2204CUK-TRPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 65Msps/40Msps |
| LTC2204IUK | 制造商:Linear Technology 功能描述:ADC Single Pipelined 40Msps 16-bit Parallel 48-Pin QFN EP 制造商:Linear Technology 功能描述:MS-ADC/High Speed, 16-bit, 40Msps ADC |
| LTC2204IUK#PBF | 制造商:Linear Technology 功能描述:ADC Single Pipelined 40Msps 16-bit Parallel 48-Pin QFN EP 制造商:Linear Technology 功能描述:Single ADC Pipelined 40Msps 16-bit Parallel 48-Pin QFN EP 制造商:Linear Technology 功能描述:IC ADC 16-BIT 40MSPS 48-QFN 制造商:Linear Technology 功能描述:ADC 16BIT 40MSPS 48QFN 制造商:Linear Technology 功能描述:ADC, 16BIT, 40MSPS, 48QFN 制造商:Linear Technology 功能描述:MS-ADC/High Speed, 16-bit, 40Msps ADC 制造商:Linear Technology 功能描述:IC, ADC, 16BIT, 40MSPS, QFN-48, Resolution (Bits):16bit, Sampling Rate:45MSPS, Supply Voltage Type:Single, Supply Voltage Min:3.135V, Supply Voltage Max:3.465V, Supply Current:145mA, Digital IC Case Style:QFN, No. of Pins:48 , RoHS Compliant: Yes |
| LTC2204IUK#TRPBF | 制造商:Linear Technology 功能描述:ADC Single Pipelined 40Msps 16-bit Parallel 48-Pin QFN EP T/R 制造商:Linear Technology 功能描述:IC ADC 16-BIT 40MSPS 48-QFN |
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