參數(shù)資料
型號(hào): LTC2161CUK#TRPBF
廠商: LINEAR TECHNOLOGY CORP
元件分類: ADC
英文描述: 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC48
封裝: 7 X 7 MM, LEAD FREE, PLASTIC, MO-220WKKD-2, QFN-48
文件頁(yè)數(shù): 31/36頁(yè)
文件大小: 651K
代理商: LTC2161CUK#TRPBF
LTC2162/LTC2161/LTC2160
4
216210f
converTer characTerisTics The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C.
PARAMETER
CONDITIONS
LTC2162
LTC2161
LTC2160
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
Resolution (No Missing Codes)
l
16
Bits
Integral Linearity Error
Differential Analog Input
(Note 6)
l
–6
±2
6
–6
±2
6
–6
±2
6
LSB
Differential Linearity Error
Differential Analog Input
l
–0.9
±0.5
0.9
–0.9
±0.5
0.9
–0.9
±0.5
0.9
LSB
Offset Error
(Note 7)
l
–7
±1.5
7
–7
±1.5
7
–7
±1.5
7
mV
Gain Error
Internal Reference
External Reference
l
–1.8
±1.5
–0.5
0.8
–1.8
±1.5
–0.5
0.8
–1.8
±1.5
–0.5
0.8
%FS
Offset Drift
±10
V/°C
Full-Scale Drift
Internal Reference
External Reference
±30
±10
±30
±10
±30
±10
ppm/°C
Transition Noise
External Reference
3.3
3.2
LSBRMS
analog inpuT The
l
denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at TA = 25°C. (Note 5)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VIN
Analog Input Range (AIN+ – AIN–)
1.7V < VDD < 1.9V
l
1 to 2
VP-P
VIN(CM)
Analog Input Common Mode (AIN+ + AIN–)/2
Differential Analog Input (Note 8)
l
0.7
VCM
1.25
V
VSENSE
External Voltage Reference Applied to SENSE
External Reference Mode
l
0.625
1.250
1.300
V
IINCM
Analog Input Common Mode Current
Per Pin, 65Msps
Per Pin, 40Msps
Per Pin, 25Msps
104
64
40
A
IIN1
Analog Input Leakage Current (No Encode)
0 < AIN+, AIN– < VDD
l
–1
1
A
IIN2
PAR/SER Input Leakage Current
0 < PAR/SER < VDD
l
–3
3
A
IIN3
SENSE Input Leakage Current
0.625 < SENSE < 1.3V
l
–3
3
A
tAP
Sample-and-Hold Acquisition Delay Time
0
ns
tJITTER
Sample-and-Hold Acquisition Delay Jitter
Single-Ended Encode
Differential Encode
0.07
0.09
psRMS
CMRR
Analog Input Common Mode Rejection Ratio
80
dB
BW-3B
Full Power Bandwidth
Figure 6 Test Circuit
550
MHz
DynaMic accuracy The
l
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at TA = 25°C. AIN = –1dBFS. (Note 5)
SYMBOL PARAMETER
CONDITIONS
LTC2162
LTC2161
LTC2160
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
SNR
Signal-to-Noise Ratio
5MHz Input
30MHz Input
70MHz Input
140MHz Input
l
75.4
77.0
76.9
76.8
76.3
75.3
76.9
76.8
76.7
76.2
75.5
77.1
77.0
76.9
76.4
dBFS
SFDR
Spurious Free Dynamic Range
2nd Harmonic
5MHz Input
30MHz Input
70MHz Input
140MHz Input
l
82
90
89
84
83
90
89
84
83
90
89
84
dBFS
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PDF描述
LTC2160CUK#PBF 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC48
LTC2162CUK#PBF 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC48
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LTC2161CUK#PBF 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC48
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