參數(shù)資料
型號: LTC1871-7
廠商: Linear Technology Corporation
英文描述: Quadruple 2-Input Positive-AND Gate 14-SOIC -40 to 85
中文描述: 2相升壓型DC / DC控制器
文件頁數(shù): 10/36頁
文件大小: 411K
代理商: LTC1871-7
10
LTC1871
APPLICATIOU
When the oscillator’s internal logic circuitry detects a
synchronizing signal on the MODE/SYNC pin, the internal
oscillator ramp is terminated early and the slope compen-
sation is increased by approximately 30%. As a result, in
applications requiring synchronization, it is recommended
that the nominal operating frequency of the IC be pro-
grammed to be about 75% of the external clock frequency.
Attempting to synchronize to too high an external fre-
quency (above 1.3f
O
) can result in inadequate slope com-
pensation and possible subharmonic oscillation (or jitter).
The external clock signal must exceed 2V for at least 25ns,
and should have a maximum duty cycle of 80%, as shown
in Figure 5. The MOSFET turn on will synchronize to the
rising edge of the external clock signal.
W
U
U
to charge and discharge an internal oscillator capacitor. A
graph for selecting the value of R
T
for a given operating
frequency is shown in Figure 6.
Figure 6. Timing Resistor (R
T
) Value
Figure 5. MODE/SYNC Clock Input and Switching
Waveforms for Synchronized Operation
1871 F05
2V TO 7V
MODE/
SYNC
GATE
I
L
t
MIN
= 25ns
0.8T
D = 40%
T
T = 1/f
O
FREQUENCY (kHz)
100
R
T
)
300
1000
1871 F06
10
100
200
1000
900
800
700
600
500
400
0
Programming the Operating Frequency
The choice of operating frequency and inductor value is a
tradeoff between efficiency and component size. Low
frequency operation improves efficiency by reducing
MOSFET and diode switching losses. However, lower
frequency operation requires more inductance for a given
amount of load current.
The LTC1871 uses a constant frequency architecture that
can be programmed over a 50kHz to 1000kHz range with
a single external resistor from the FREQ pin to ground, as
shown in Figure 1. The nominal voltage on the FREQ pin is
0.6V, and the current that flows into the FREQ pin is used
INTV
CC
Regulator Bypassing and Operation
An internal, P-channel low dropout voltage regulator pro-
duces the 5.2V supply which powers the gate driver and
logic circuitry within the LTC1871, as shown in Figure 7.
The INTV
CC
regulator can supply up to 50mA and must be
bypassed to ground immediately adjacent to the IC pins
with a minimum of 4.7
μ
F tantalum or ceramic capacitor.
Good bypassing is necessary to supply the high transient
currents required by the MOSFET gate driver.
For input voltages that don’t exceed 7V (the absolute
maximum rating for this pin), the internal low dropout
regulator in the LTC1871 is redundant and the INTV
CC
pin
can be shorted directly to the V
IN
pin. With the INTV
CC
pin
shorted to V
IN
, however, the divider that programs the
regulated INTV
CC
voltage will draw 10
μ
A of current from
the input supply, even in shutdown mode. For applications
that require the lowest shutdown mode input supply
current, do not connect the INTV
CC
pin to V
IN
. Regardless
of whether the INTV
CC
pin is shorted to V
IN
or not,
it is
always necessary to have the driver circuitry bypassed
with a 4.7
μ
F tantalum or low ESR ceramic capacitor to
ground immediately adjacent to the INTV
CC
and GND
pins.
In an actual application, most of the IC supply current is
used to drive the gate capacitance of the power MOSFET.
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