t17 WR High Time (Note 10) q 50 " />
參數(shù)資料
型號(hào): LTC1850IFW
廠商: Linear Technology
文件頁數(shù): 25/28頁
文件大小: 0K
描述: IC ADC 10BIT 1.25MSPS 48-TSSOP
標(biāo)準(zhǔn)包裝: 39
位數(shù): 10
采樣率(每秒): 1.25M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 50mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-TFSOP(0.240",6.10mm 寬)
供應(yīng)商設(shè)備封裝: 48-TSSOP
包裝: 管件
輸入數(shù)目和類型: 8 個(gè)單端,單極;8 個(gè)單端,雙極;4 個(gè)差分,單極;4 個(gè)差分,雙極
6
LTC1850/LTC1851
18501f
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
t17
WR High Time
(Note 10)
q
50
ns
t18
M1 to M0 Setup Time
(Notes 9, 10)
q
10
ns
t19
M0 to BUSY Delay
M1 High
20
ns
t20
M0 to WR (or RD) Setup Time
(Notes 9, 10)
q
t19
ns
t21
M0 High Pulse Width
(Note 10)
q
50
ns
t22
RD High Time Between Readback Reads
(Note 10)
q
50
ns
t23
Last WR (or RD) to M0
(Note 10)
q
10
ns
t24
M0 to RD Setup Time
(Notes 9, 10)
q
t19
ns
t25
M0 to CONVST
(Note 10)
q
t19
ns
t26
Aperture Delay
– 0.5
ns
t27
Aperture Jitter
2psRMS
Note 1: Absolute maximum ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to ground with GND, OGND and
GND wired together unless otherwise noted.
Note 3: When these pin voltages are taken below ground or above VDD,
they will be clamped by internal diodes. This product can handle input
currents of 100mA below ground or above VDD without latchup.
Note 4: When these pin voltages are taken below ground, they will be
clamped by internal diodes. This product can handle input currents of
100mA below ground without latchup. These pins are not clamped to VDD.
Note 5: VDD = 4.75V to 5.25V, fSAMPLE = 1.25MHz, tr = tf = 2ns unless
otherwise specified.
Note 6: Linearity, offset and full-scale specifications apply for a single-
ended input on any channel with COM grounded.
Note 7: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual end points of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 8: Bipolar offset is the offset voltage measured from – 0.5LSB when
the output code flickers between 0111 1111 1111 and 1000 0000 0000 for
LTC1851 and between 01 1111 1111 and 10 0000 0000 for LTC1850.
Note 9: Guaranteed by design, not subject to test.
Note 10: Recommended operating conditions.
Note 11: The falling CONVST edge starts a conversion. If CONVST returns
high at a critical point during the conversion it can create small errors. For
the best results, ensure that CONVST returns high either within 400ns
after the start of the conversion or after BUSY rises.
Note 12: The analog input range is determined by the voltage on
REFCOMP. The gain error specification is tested with an external 4.096V
but is valid for any value of REFCOMP.
The q denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 5)
TI I G CHARACTERISTICS
U
W
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