參數(shù)資料
型號: LTC1850IFW
廠商: Linear Technology
文件頁數(shù): 17/28頁
文件大?。?/td> 0K
描述: IC ADC 10BIT 1.25MSPS 48-TSSOP
標(biāo)準(zhǔn)包裝: 39
位數(shù): 10
采樣率(每秒): 1.25M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 50mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-TFSOP(0.240",6.10mm 寬)
供應(yīng)商設(shè)備封裝: 48-TSSOP
包裝: 管件
輸入數(shù)目和類型: 8 個單端,單極;8 個單端,雙極;4 個差分,單極;4 個差分,雙極
24
LTC1850/LTC1851
18501f
Table 5
OPERATION MODE
M1
M0
WR
RD
COMMENTS
Direct Address
0
OE
Address and Configuration are Driven from External Pins
0
OE
Address and Configuration are Latched on Rising Edge of WR or Falling Edge of CONVST
Scan
0
1
0
OE
Address is Provided by Internal Scan Counter, Configuration is Driven from External Pins
0
1
OE
Configuration is Latched on Rising Edge of WR or Falling Edge of CONVST
Program
1
0
1
Write Sequencer Location, WR Low Enables Inputs, Rising Edge of WR Latches Data and
Advances to Next Location
Readback
1
0
1
Read Sequencer Location, Falling Edge of RD Enables Output, Rising Edge of RD
Advances to Next Location
Sequence Run
1
X
OE
Run Programmed Sequence, Falling Edge of CONVST Starts Conversion and Advances to
Next Location
Sequence Run Mode
Once the sequencer is programmed, M0 is taken high.
BUSY will also come back high enabling CONVST and the
next falling CONVST will begin a conversion using the
MUX address and input configuration stored in location
0000 of the sequencer memory. After each conversion, the
sequencer pointer is advanced by one and the MUX
address (the actual channel or channels being converted,
not the sequencer pointer) for the present conversion is
available on the address output pins along with the con-
version result. When the sequencer finishes converting
the last programmed location, the sequencer pointer will
return to location 0000 for the next conversion. The
sequencer will also reset to location 0000 anytime the M1
or M0 pin changes state.
The contents of the sequencer memory will be retained as
long as power is continuously applied to the part. This
allows the user to switch from Sequence Run mode to
either Direct Address or Scan Mode and back without
losing the programmed sequence. The part can also be
disabled using CS or shutdown in Nap or Sleep mode
without losing the programmed sequence. Table 5 out-
lines the operational modes of the LTC1850/LTC1851.
Figures 11 and 12 show the timing diagrams for writing to,
reading from and running a sequence with the LTC1850/
LTC1851.
APPLICATIO S I FOR ATIO
WU
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