參數(shù)資料
型號(hào)： LTC1297DCN8
廠商： Linear Technology
文件頁(yè)數(shù)： 11/24頁(yè)
文件大小： 0K
描述： IC DATA ACQ SYSTEM 12BIT 8-DIP
標(biāo)準(zhǔn)包裝： 50
類型： 數(shù)據(jù)采集系統(tǒng)（DAS）
分辨率（位）： 12 b
采樣率（每秒）： 60k
數(shù)據(jù)接口： 串行，并聯(lián)
電壓電源： 單電源
電源電壓： 5V
工作溫度： 0°C ~ 70°C
安裝類型： 通孔
封裝/外殼： 8-DIP（0.300"，7.62mm）
供應(yīng)商設(shè)備封裝： 8-PDIP
包裝： 管件
產(chǎn)品目錄頁(yè)面： 1346 (CN2011-ZH PDF)
19
LTC1292/LTC1297
12927fb
is reduced. The typical performance characteristics
curve of Noise Error vs Reference Voltage shows the
LSB contribution of this 200
V of noise.
For operation with a 5V reference, the 200
V noise is
only 0.16LSB peak-to-peak. Here the LTC1292/LTC1297
noise will contribute virtually no uncertainty to the
output code. For reduced references, the noise may
become a significant fraction of an LSB and cause
undesirable jitter in the output code. For example, with
a 1.25V reference, this 200
V noise is 0.64LSB peak-
to-peak. This will reduce the range of input voltages
over which a stable output code can be achieved by
0.64LSB. Now, averaging readings may be necessary.
This noise data was taken in a very clean test fixture.
Any setup induced noise (noise or ripple on VCC, VREF
or VIN) will add to the internal noise. The lower the
reference voltage used, the more critical it becomes to
have a noise-free setup.
Gain Error Due to Reduced VREF
The gain error of the LTC1292/LTC1297 is very good
over a wide range of reference voltages. The error
component that is seen in the typical performance
characteristics curve Change in Gain Error vs Refer-
ence Voltage is due to the voltage drop on the GND pin
from the device to the ground plane. To minimize this
error the LTC1292/LTC1297 should be soldered di-
rectly onto the PC board. The internal reference point
for VREF is tied to GND. Any voltage drop in the GND pin
will make the reference voltage, internal to the device,
less than what is applied externally (Figure 19). This
drop is typically 420
V due to the product of the pin
resistance (RPIN) and the LTC1292/LTC1297 supply
U
S
A
O
PPLICATI
WU
U
I FOR ATIO
This is the effective number of bits (ENOB). For the
example shown in Figures 20a and 20b, N = 11.8 bits
and 9.9 bits, respectively. Figure 21 shows a plot of
ENOB as a function of input frequency. The 2nd har-
monic distortion term accounts for the degradation of
the ENOB as fIN approaches fS/2.
Figure 22 shows an FFT plot of the output spectrum for
two tones applied to the input of the A/D. Nonlinearities
in the A/D will cause distortion products at the sum and
difference frequencies of the fundamentals and prod-
ucts of the fundamentals. This is classically referred to
as intermodulation distortion (IMD).
LTC1292
LTC1297
REF+
RPIN
ICC
DAC
REF–
VREF
GND
LTC1292/7 F19
± REFERENCE
VOLTAGE
current. For example, with VREF = 1.25V this will result
in a gain error change of –1.0LSB from the gain error
measured with VREF = 5V.
LTC1292 AC Characteristics
Two commonly used figures of merit for specifying the
dynamic performance of the A/Ds in digital signal
processing applications are the Signal-to-Noise Ratio
(SNR) and the “Effective Number of Bits (ENOB).” SNR
is the ratio of the RMS magnitude of the fundamental to
the RMS magnitude of all the non-fundamental signals
up to the Nyquist frequency (half the sampling fre-
quency). The theoretical maximum SNR for a sine wave
input is given by:
SNR = (6.02N + 1.76dB)
where N is the number of bits. Thus the SNR depends
on the resolution of the A/D. For an ideal 12-bit A/D the
SNR is equal to 74dB. Fast Fourier Transform (FFT)
plots of the output spectrum of the LTC1292 are shown
in Figures 20a and 20b. The input (fIN) frequencies are
1kHz and 28kHz with the sampling frequency (fS) at
58.8 kHz. The SNRs obtained from the plots are 73.0dB
and 61.5dB.
By rewriting the SNR expression it is possible to obtain
the equivalent resolution based on the SNR measure-
ment.
N
SNR
dB
=
–.
.
176
602
Figure 19. Parasitic Resistance in GND Pin
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