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參數(shù)資料
| 型號： | LTC1290CISW#TR |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 2/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DATA ACQ SYS 12BIT 5V 20SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 數(shù)據(jù)采集系統(tǒng)（DAS），ADC |
| 分辨率（位）： | 12 b |
| 采樣率（每秒）： | 50k |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 電壓電源： | 雙 ± |
| 電源電壓： | ±5 V，5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-SOIC |
| 包裝： | 帶卷 (TR) |
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LTC1290
1290fe
U
S
A
O
PPLICATI
WU
U
I FOR ATIO
previous conversion is output on the DOUT line. At the end
of the data exchange the requested conversion begins and
CS should be brought high. After tCONV, the conversion is
complete and the results will be available on the next data
transfer cycle. As shown below, the result of a conversion
is delayed by one CS cycle from the input word requesting it.
The LTC1290 is a data acquisition component which
contains the following functional blocks:
1. 12-bit successive approximation capacitive A/D
converter
2. Analog multiplexer (MUX)
3. Sample-and-hold (S/H)
4. Synchronous, full duplex serial interface
5. Control and timing logic
DIGITAL CONSIDERATIONS
Serial Interface
The LTC1290 communicates with microprocessors and
other external circuitry via a synchronous, full duplex,
four-wire serial interface (see Operating Sequence). The
shift clock (SCLK) synchronizes the data transfer with
each bit being transmitted on the falling SCLK edge and
captured on the rising SCLK edge in both transmitting and
receiving systems. The data is transmitted and received
simultaneously (full duplex).
Data transfer is initiated by a falling chip select (CS) signal.
After the falling CS is recognized, an 8-bit input word is
shifted into the DIN input which configures the LTC1290
for the next conversion. Simultaneously, the result of the
SGL/
DIFF
SELECT
1
SELECT
0
UNI
MSBF
WL1
MUX ADDRESS
MSB-FIRST/
LSB-FIRST
UNIPOLAR/
BIPOLAR
WORD
LENGTH
LTC1290 AI02
ODD/
SIGN
WL0
DIN
DOUT DOUT WORD 0
DIN WORD 1
DATA
TRANSFER
DOUT WORD 2
DIN WORD 3
DOUT WORD 1
DIN WORD 2
DATA
TRANSFER
tCONV
A/D
CONVERSION
tCONV
A/D
CONVERSION
LTC1290 AI01
Input Data Word
The LTC1290 8-bit data word is clocked into the DIN input
on the first eight rising SCLK edges after chip select is
recognized. Further inputs on the DIN pin are then ignored
until the next CS cycle. The eight bits of the input word are
defined as follows:
123456789
10
11
12
tCONV
tCYC
SHIFT CONFIGURATION
WORD IN
tSMPL
SHIFT A/D RESULT OUT AND
NEW CONFIGURATION WORD IN
B11 B10 B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
(SB)
LTC1290 AI03
SCLK
DIN
DOUT
CS
DON’T CARE
Operating Sequence
(Example: Differential Inputs (CH3-CH2), Bipolar, MSB-First and 12-Bit Word Length)
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