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參數(shù)資料
| 型號： | LTC1287CIJ |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 3V Single Chip 12-Bit Data Acquisition System |
| 中文描述： | 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, CDIP8 |
| 封裝： | CERAMIC, DIP-8 |
| 文件頁數(shù)： | 8/16頁 |
| 文件大?。?/td> | 324K |
| 代理商： | LTC1287CIJ |
8
LTC1287
U
S
A
O
PPLICATI
IU
U
specified at 3.3V. The output D
OUT
is also compatible with
the above standards. The following summarizes such
levels.
V
OH
(no load)
V
OL
(no load)
V
OH
V
OL
V
IH
V
IL
The LTC1287 can be driven with 5V logic even when V
CC
is at 3.3V. This is due to a unique input protection device
that is found on the LTC1287.
V
CC
– 0.1V
0.1V
0.9
×
V
CC
0.1
×
V
CC
0.7
×
V
CC
0.2
×
V
CC
Microprocessor Interfaces
The LTC1287 can interface directly (without external hard-
ware) to most popular microprocessor (MPU) synchro-
nous serial formats. If an MPU without a serial interface is
used, then three of the MPU’s parallel port lines can be
programmed to form the serial link to the LTC1287. Many
of the popular MPUs can operate with 3V supplies. For
example the MC68HC11 is an MPU with a serial format
(SPI). Likewise parallel MPUs that have the 8051 type
architecture are also capable of operating at this voltage
range. The code for these processors remains the same
and can be found in the LTC1292 data sheet.
Sharing the Serial Interface
The LTC1287 can share the same two-wire serial interface
with other peripheral components or other LTC1287s
(Figure 2). In this case, the CS signals decide which
LTC1287 is being addressed by the MPU.
Figure 2. Several LTC1287s Sharing One 2-Wire Serial Interface
Figure 3. Example Ground Plane for the LTC1287
LTC1287
2 CHANNELS
2 CHANNELS
2 CHANNELS
CS
CS
CS
2
2
2
2
2-WIRE SERIAL
INTERFACE TO OTHER
PERIPHERALS OR LTC1287s
2
1
0
OUTPUT PORT
SERIAL DATA
MPU
LTC1287 F02
LTC1287
LTC1287
ANALOG CONSIDERATIONS
Grounding
The LTC1287 should be used with an analog ground plane
and single point grounding techniques. Do not use wire
wrapping techniques to breadboard and evaluate the device.
To achieve the optimum performance use a PC board. The
ground pin (Pin 4) should be tied directly to the ground
plane with minimum lead length (a low profile socket is
fine). Pin 7 (V
CC
) should be bypassed to the ground plane
with a 22
μ
F (minimum value) tantalum with leads as short
as possible and as close as possible to the pin. A 0.1
μ
F
ceramic disk also should be placed in parallel with the
22
μ
F and again with leads as short as possible and as close
to V
CC
as possible. Figure 3 shows an example of an ideal
LTC1287 ground plane design for a two-sided board. Of
course this much ground plane will not always be possible,
but users should strive to get as close to this ideal as
possible.
Bypassing
For good performance, V
CC
must be free of noise and
ripple. Any changes in the V
CC
voltage with respect to
ground during a conversion cycle can induce errors or
noise in the output code. V
CC
noise and ripple can be kept
below 0.5mV by bypassing the V
CC
pin directly to the
analog plane with a minimum of 22
μ
F tantalum capacitor
and with leads as short as possible. The lead from the
device to the V
CC
supply also should be kept to a minimum
and the V
CC
supply should have a low output impedance
1
2
3
4
5
6
7
8
LTC1287
22
μ
F TANTALUM
V
CC
LTC1287 F03/DB
0.1
μ
F
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