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參數(shù)資料
| 型號： | LTC1098LIS8#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 3/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC A/D CONV 8BIT SRL IN/OUT8SOIC |
| 標(biāo)準(zhǔn)包裝： | 100 |
| 位數(shù)： | 8 |
| 采樣率（每秒）： | 33k |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 780µW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 1 個差分，單極 |
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LTC1096/LTC1096L
LTC1098/LTC1098L
11
10968fc
PIN FUNCTIONS
LTC1096/LTC1096L
CS/SHDN (Pin 1): Chip Select Input. A logic low on this
input enables the LTC1096/LTC1096L. A logic high on this
input disables the LTC1096/LTC1096L and disconnects the
power to the LTC1096/LTC1096L.
IN+ (Pin 2):
Analog Input. This input must be free of noise
with respect to GND.
IN– (Pin 3):
Analog Input. This input must be free of noise
with respect to GND.
GND (Pin 4): Analog Ground. GND should be tied directly
to an analog ground plane.
VREF (Pin 5): Reference Input. The reference input denes
the span of the A/D converter and must be kept free of
noise with respect to GND.
DOUT (Pin 6): Digital Data Output. The A/D conversion
result is shifted out of this output.
CLK (Pin 7): Shift Clock. This clock synchronizes the se-
rial data transfer.
VCC(Pin8):PowerSupplyVoltage.Thispinprovidespower
to the A/D converter. It must be free of noise and ripple by
bypassing directly to the analog ground plane.
LTC1098/LTC1098L
CS/SHDN (Pin 1): Chip Select Input. A logic low on this
input enables the LTC1098/LTC1098L. A logic high on this
input disables the LTC1098/LTC1098L and disconnects the
power to the LTC1098/LTC1098L.
CH0 (Pin 2): Analog Input. This input must be free of noise
with respect to GND.
CH1 (Pin 3): Analog Input. This input must be free of noise
with respect to GND.
GND (Pin 4): Analog Ground. GND should be tied directly
to an analog ground plane.
DIN (Pin 5): Digital Data Input. The multiplexer address
is shifted into this pin.
DOUT (Pin 6): Digital Data Output. The A/D conversion
result is shifted out of this output.
CLK (Pin 7): Shift Clock. This clock synchronizes the se-
rial data transfer.
VCC(VREF)(Pin8):PowerSupplyVoltage.Thispinprovides
power and denes the span of the A/D converter. It must
be free of noise and ripple by bypassing directly to the
analog ground plane.
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| LTC1098LIS8-TR | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Micropower Sampling 8-Bit Serial I/O A/D Converters |
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