A. f
參數(shù)資料
型號(hào)： LTC1065ISW#TR
廠商： Linear Technology
文件頁(yè)數(shù)： 11/16頁(yè)
文件大?。?/td> 0K
描述： IC FILTER LP 5TH ORD LIN 16SOIC
標(biāo)準(zhǔn)包裝： 1,000
濾波器類型： 貝塞爾，低通開關(guān)電容器
頻率 - 截止或中心： 50kHz
濾波器數(shù)： 1
濾波器階數(shù)： 5th
電源電壓： ±2.37 V ~ 8 V
安裝類型： 表面貼裝
封裝/外殼： 16-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 16-SOIC
包裝： 帶卷 (TR)
4
LTC1065
1065fb
INPUT FREQUENCY (kHz)
1
GAIN
(dB)
10
100
1065 G06
10
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
200
A
B
C
A. fCLK = 1MHz
B. fCLK = 2MHz
C. fCLK = 3MHz
D. fCLK = 4MHz
E. fCLK = 5MHz
VIN = 1.4VRMS
TA = 25°C
E
D
INPUT FREQUENCY (kHz)
1
GAIN
(dB)
10
100
1065 G05
10
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
200
A
B
C
D
A. fCLK = 1MHz
B. fCLK = 2MHz
C. fCLK = 3MHz
D. fCLK = 4MHz
VIN = 1.4VRMS
TA = 25°C
INPUT FREQUENCY (kHz)
1
GAIN
(dB)
10
100
1065 G04
B
C
VIN = 750mVRMS
TA = 25°C
10
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
200
A
A. fCLK = 0.5MHz
B. fCLK = 1MHz
C. fCLK = 2MHz
ELECTRICAL C
C
HARA TERISTICS
Output Offset vs Clock,
Medium Clock Rates
Self-Clocking Frequency vs R
Output Offset vs Clock,
Low Clock Rates
EXTERNAL CLOCK FREQUENCY (kHz)
OUTPUT
OFFSET
(mV)
5
4
3
2
1
0
–1
–2
–3
–4
–5
1065 G03
500
1000
0
VS = ±7.5V
VS = ±5V
VS = ±2.5V
FREQUENCY (kHz)
R
PINS
4
TO
5
(k
)
110
100
90
80
70
60
50
40
30
20
10
1065 G01
100
300
500
LTC1065
R
C
4
5
C = 200pF
fOSC 1/RC
Gain vs Frequency; VS = ±7.5V
Gain vs Frequency; VS = ±2.5V
Gain vs Frequency; VS = ±5V
CC
HARA TERISTICS
UW
A
TYPICALPERFOR
CE
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The maximum clock frequency is arbitrarily defined as the
frequency at which the filter AC response exhibits
≥ 1dB of gain peaking.
Note 3: At limited temperature ranges (i.e., TA ≤ 50°C) the minimum clock
frequency can be as low as 10Hz. The typical minimum clock frequency is
arbitrarily defined as the clock frequency at which the output DC offset
changes by more than 1mV.
Note 4: The wideband noise specification does not include the clock
feedthrough.
Note 5: To properly evaluate the filter’s harmonic distortion an inverting
output buffer is recommended. An output buffer (although recommended)
is not necessarily needed when measuring output DC offset or wideband
noise (see Figure 3).
Note 6: The output DC offset is optimized for
±5V supply. The output DC
offset shifts when the power supplies change; however, this phenomenon
is repeatable and predictable.
Note 7: The LTC1065C is guaranteed to meet the specified performance
from 0
°C to 70°C and is designed, characterized and expected to meet
specified performance from –40
°C to 85°C but is not tested or QA
sampled at these temperatures. The LTC1065I is guaranteed to meet
specified performance from –40
°C to 85°C.
EXTERNAL CLOCK FREQUENCY (Hz)
OUTPUT
OFFSET
(mV)
50
45
40
35
30
25
20
15
10
5
0
1065 G02
10
110
210
A
B
A. TA = 25°C
B. TA = 85°C
VS = ±5V
相關(guān)PDF資料
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