IN– and IN+
參數(shù)資料
型號(hào)： LT6600CS8-2.5#TRPBF
廠商： Linear Technology
文件頁(yè)數(shù)： 14/16頁(yè)
文件大?。?/td> 0K
描述： IC AMP DIFF LP FLTR 2.5MHZ 8SOIC
標(biāo)準(zhǔn)包裝： 2,500
放大器類型： 差分
電路數(shù)： 1
輸出類型： 差分
電流 - 輸入偏壓： 15µA
電壓 - 輸入偏移： 5000µV
電流 - 電源： 28mA
電壓 - 電源，單路/雙路(±)： 3 V ~ 11 V，±1.5 V ~ 5.5 V
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 8-SO
包裝： 帶卷 (TR)
LT6600-2.5
7
660025fe
PIN FUNCTIONS
IN– and IN+ (Pins 1, 12/Pins 1, 8): Input Pins. Signals can
be applied to either or both input pins through identical
external resistors, RIN. The DC gain from differential inputs
to the differential outputs is 1580Ω/RIN.
NC (Pins 2, 5, 11/NA): No Connection
VOCM (Pin 3/Pin 2): DC Common Mode Reference Voltage-
for the 2nd Filter Stage. Its value programs the common
mode voltage of the differential output of the lter. This
is a high impedance input, which can be driven from an
external voltage reference, or it can be tied to VMID on the
PC board. VOCM should be bypassed with a 0.01μF ceramic
capacitor unless it is connected to a ground plane.
V+ and V– (Pins 4, 8, 9/Pins 3, 6):
Power Supply Pins. For
a single 3.3V or 5V supply (V– grounded) a quality 0.1μF
ceramic bypass capacitor is required from the positive
supply pin (V+) to the negative supply pin (V–). The bypass
should be as close as possible to the IC. For dual supply
applications, bypass V+ to ground and V– to ground with
a quality 0.1μF ceramic capacitor.
OUT+ and OUT– (Pins 6, 7/Pins 4, 5):
Output Pins. These
are the lter differential outputs. Each pin can drive a 100Ω
and/or 50pF load to AC ground.
VMID (Pin 10/Pin 7): The VMID pin is internally biased at
mid-supply, see Block Diagram. For single supply op-
eration, the VMID pin should be bypassed with a quality
0.01μF ceramic capacitor to V–. For dual supply operation,
VMID can be bypassed or connected to a high quality DC
ground. A ground plane should be used. A poor ground
will increase noise and distortion. VMID sets the output
common mode voltage of the 1st stage of the lter. It has
a 5.5kΩ impedance, and it can be overridden with an
external low impedance voltage source.
(DFN/SO)
BLOCK DIAGRAM
–
+ –
+
VOCM
–
+
VOCM
1580Ω
800Ω
V+
V–
11k
OP AMP
PROPRIETARY
LOWPASS
FILTER STAGE
VIN
–
VIN
+
RIN
660025 BD
IN+
VOCM
V+
OUT+
OUT–
V–
VMID
IN–
相關(guān)PDF資料
PDF描述
SSW-145-02-G-S CONN RCPT .100" 45POS SNGL GOLD
1.5KE27CA-E3/54 TVS BIDIR 1.5KW 27V 5% 1.5KE
LT6600CS8-2.5#TR IC AMP DIFF LP FLTR 2.5MHZ 8SOIC
SSW-146-02-G-S CONN RCPT .100" 46POS SNGL GOLD
LT1498IN8#PBF IC OP-AMP R-R IN/OUT DUAL 8-DIP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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