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參數(shù)資料
| 型號： | LT6556CUF#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 15/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC VIDEO MULTIPLEXER 2X1 24QFN |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 功能： | 視頻多路復(fù)用器 |
| 電路： | 3 x 2:1 |
| 電壓電源： | 雙電源 |
| 電壓 - 電源，單路/雙路(±)： | ±2.25 V ~ 6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 24-QFN 裸露焊盤（4x4） |
| 包裝： | 帶卷 (TR) |
LT6556
8
6556f
APPLICATIO S I FOR ATIO
WU
U
Power Supplies
The LT6556 is optimized for ±5V supplies but can be op-
erated on as little as ±2.25V or a single 4.5V supply and
as much as ±6V or a single 12V supply. Internally, each
supply is independent to improve channel isolation. Do
not leave any supply pins disconnected or the part may
not function correctly!
Enable/Shutdown
The LT6556 has a shutdown mode controlled by the
EN
pin and referenced to the DGND pin. If the amplier will be
enabled at all times, the
EN pin can be connected directly
to DGND. If the enable function is desired, either driving
the pin above 2V or allowing the internal 46k pull-up
resistor to pull the
EN pin to the top rail will disable the
amplier. When disabled, the output will become very
high impedance. Supply current into the amplier in the
disabled state will be:
I
VV
k
VV
k
S
EN
=+
+
–
– –
46
80
It is important that the following constraints on the DGND,
EN and SEL pins are always followed:
V+ – VDGND ≥ 4.5V
-0.5V ≤ VEN – VDGND ≤ 5.5V
VSEL – VDGND ≤ 8V
In dual supply cases where V+ is less than 4.5V, DGND
should be connected to a potential below ground, such as
V–. Since the
EN and SEL pins are referenced to DGND, they
may need to be pulled below ground in those cases. However,
in order to protect the internal enable circuitry, the
EN pin
should not be forced more than 0.5V below DGND.
In single supply applications above 5.5V, an additional
resistor may be needed from the
EN pin to DGND if the
pin is ever allowed to oat. For example, on a 12V single
supply, a 33k resistor would protect the pin from oating
too high while still allowing the internal pull-up resistor
to disable the part.
On dual ±2.25V supplies, connecting the DGND pin to V– is
the only way of ensuring that V+ – VDGND ≥ 4.5V.
The enable/disable times of the LT6556 are fast when
driven with a logic input. Turn on (from 50%
EN input to
50% output) typically occurs in less than 50ns. Turn off
is slower, but is typically below 500ns.
Channel Select
The SEL pin uses the same internal threshold as the
EN
pin and is also referenced to DGND. When the pin is logic
low, the channel A inputs are passed to the output. When
the pin is logic high, the channel B inputs are passed to
the output. The pin should not be oated but can be tied
to DGND to force the outputs to always be channel A or
to V+ (when less than 8V) to force the outputs to always
be channel B.
Truth Table
SEL
A/B
EN
OUT
0
IN A
1
0
IN B
X
1
OFF
Input Considerations
The LT6556 uses input clamps referenced to the VREF pin
to prevent damage to the input stage on the unselected
channel. Three transistors in series limit the input voltage to
within three diode drops (±) from VREF. VREF is nominally
set to half of the sum of the supplies by the 40k resistors.
A simplied schematic is shown in Figure 1.
VREF
40k
6556 F01
V+
V–
IN
Figure 1. Simplied Schematic of VREF Pin and Input Clamping
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LT6556IGN | 制造商:Linear Technology 功能描述:Video Multiplexer 24-Pin SSOP N |
| LT6556IGN#PBF | 功能描述:IC VIDEO MULTIPLEXER 2X1 24SSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 其它有關(guān)文件:STG4159 View All Specifications 標(biāo)準(zhǔn)包裝:5,000 系列:- 功能:開關(guān) 電路:1 x SPDT 導(dǎo)通狀態(tài)電阻:300 毫歐 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±1.65 V ~ 4.8 V 電流 - 電源:50nA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:7-WFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:7-覆晶 包裝:帶卷 (TR) |
| LT6556IGN#TRPBF | 功能描述:IC VIDEO MULTIPLEXER 2X1 24SSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 其它有關(guān)文件:STG4159 View All Specifications 標(biāo)準(zhǔn)包裝:5,000 系列:- 功能:開關(guān) 電路:1 x SPDT 導(dǎo)通狀態(tài)電阻:300 毫歐 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±1.65 V ~ 4.8 V 電流 - 電源:50nA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:7-WFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:7-覆晶 包裝:帶卷 (TR) |
| LT6556IUF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:750MHz Gain of 1 Triple 2:1Video Multiplexer |
| LT6556IUF#PBF | 功能描述:IC VIDEO MULTIPLEXER 2X1 24QFN RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 其它有關(guān)文件:STG4159 View All Specifications 標(biāo)準(zhǔn)包裝:5,000 系列:- 功能:開關(guān) 電路:1 x SPDT 導(dǎo)通狀態(tài)電阻:300 毫歐 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±1.65 V ~ 4.8 V 電流 - 電源:50nA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:7-WFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:7-覆晶 包裝:帶卷 (TR) |
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