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參數(shù)資料
| 型號： | LT6556CUF#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 14/16頁 |
| 文件大小： | 0K |
| 描述： | IC VIDEO MULTIPLEXER 2X1 24QFN |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 功能： | 視頻多路復(fù)用器 |
| 電路： | 3 x 2:1 |
| 電壓電源： | 雙電源 |
| 電壓 - 電源，單路/雙路(±)： | ±2.25 V ~ 6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 24-QFN 裸露焊盤（4x4） |
| 包裝： | 帶卷 (TR) |
LT6556
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6556f
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IN1A (Pin 1): Channel 1 Input A. This pin has a nominal
impedance of 500kΩ and does not have any internal
termination resistor.
DGND (Pin 2): Digital Ground Reference for Enable Pin.
This pin is normally connected to ground.
IN2A (Pin 3): Channel 2 Input A. This pin has a nominal
impedance of 500kΩ and does not have any internal
termination resistor.
VREF (Pin 4): Voltage Reference for Input Clamping. This
is the tap to an internal voltage divider that denes mid-
supply. It is normally connected to ground in dual supply,
DC coupled applications.
IN3A (Pin 5): Channel 3 Input A. This pin has a nominal
impedance of 500kΩ and does not have any internal
termination resistor.
AGND (Pin 6): Analog Ground for Isolation between IN3A
and IN1B. AGND pins have ESD protection and should not be
connected to potentials outside the power supply range.
IN1B (Pin 7): Channel 1 Input B. This pin has a nominal
impedance of 500kΩ and does not have any internal
termination resistor.
AGND (Pin 8): Analog Ground for Isolation between IN1B
and IN2B. AGND pins have ESD protection and should not be
connected to potentials outside the power supply range.
IN2B (Pin 9): Channel 2 Input B. This pin has a nominal
impedance of 500kΩ and does not have any internal
termination resistor.
AGND (Pin 10): Analog Ground for Isolation between
IN2B and IN3B. AGND pins have ESD protection and
should not be connected to potentials outside the power
supply range.
IN3B (Pin 11): Channel 3 Input B. This pin has a nominal
impedance of 500kΩ and does not have any internal
termination resistor.
V– (Pin 12): Negative Supply Voltage. V– pins are not in-
ternally connected to each other and must all be connected
externally. Proper supply bypassing is necessary for best
performance. See the Applications Information section.
V+ (Pins 13, 14, 24): Positive Supply Voltage. V+ pins
are not internally connected to each other and must all
be connected externally. Proper supply bypassing is
necessary for best performance. See the Applications
Information section.
V– (Pin 15): Negative Supply Voltage for Channel 3 Output
Stage. V– pins are not internally connected to each other and
must all be connected externally. Proper supply bypassing
is necessary for best performance. See the Applications
Information section.
OUT3 (Pin 16): Channel 3 Output. It is the buffered output
of the selected Channel 3 input.
V+ (Pin 17): Positive Supply Voltage for Channels 2 and
3 Output Stages. V+ pins are not internally connected to
each other and must all be connected externally. Proper
supply bypassing is necessary for best performance. See
the Applications Information section.
OUT2 (Pin 18): Channel 2 Output. It is the buffered output
of the selected Channel 2 input.
V– (Pin 19): Negative Supply Voltage for Channels 1 and
2 Output Stages. V– pins are not internally connected to
each other and must all be connected externally. Proper
supply bypassing is necessary for best performance. See
the Applications Information section.
OUT1 (Pin 20): Channel 1 Output. It is the buffered output
of the selected Channel 1 input.
V+ (Pin 21): Positive Supply Voltage for Channel 1 Output
Stage. V+ pins are not internally connected to each other and
must all be connected externally. Proper supply bypassing
is necessary for best performance. See the Applications
Information section.
SEL
A/B (Pin 22): Select Pin. This high impedance pin
selects which set of inputs are sent to the output pins.
When the pin is pulled low, the A inputs are selected. When
the pin is pulled high, the B inputs are selected.
EN (Pin 23): Enable Control Pin. An internal pull-up resistor
of 46k denes the pin’s impedance and will turn the part
off if the pin is unconnected. When the pin is pulled low,
the ampliers are enabled.
Exposed Pad (Pin 25, QFN Only): The Exposed Pad is
V– and must be soldered to the PCB. It is internally con-
nected to the QFN Pin 4, V–.
(GN24 Package)
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| LT6556IGN | 制造商:Linear Technology 功能描述:Video Multiplexer 24-Pin SSOP N |
| LT6556IGN#PBF | 功能描述:IC VIDEO MULTIPLEXER 2X1 24SSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 其它有關(guān)文件:STG4159 View All Specifications 標(biāo)準(zhǔn)包裝:5,000 系列:- 功能:開關(guān) 電路:1 x SPDT 導(dǎo)通狀態(tài)電阻:300 毫歐 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±1.65 V ~ 4.8 V 電流 - 電源:50nA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:7-WFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:7-覆晶 包裝:帶卷 (TR) |
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