參數(shù)資料
型號(hào)： LT3645HMSE#TRPBF
廠商： Linear Technology
文件頁(yè)數(shù)： 9/24頁(yè)
文件大?。?/td> 300K
描述： IC REG DL BUCK/LINEAR 12-MSOP
標(biāo)準(zhǔn)包裝： 2,500
拓?fù)洌?/td> 降壓（降壓）（1），線性（LDO）（1）
功能： 車(chē)載
輸出數(shù)： 2
頻率 - 開(kāi)關(guān)： 750kHz
電壓/電流 - 輸出 1： 0.8 V ~ 16 V，500mA
電壓/電流 - 輸出 2： 0.8 V ~ 8 V，200mA
帶 LED 驅(qū)動(dòng)器： 無(wú)
帶監(jiān)控器： 無(wú)
帶序列發(fā)生器： 無(wú)
電源電壓： 3.6 V ~ 36 V
工作溫度： -40°C ~ 150°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 12-TSSOP （0.118"，3.00mm 寬）裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 12-MSOP，裸露焊盤(pán)
包裝： 帶卷 (TR)
LT3645
9
3645f
 OPERATION
The LT3645 includes a constant frequency, current mode
step-down buck switching regulator together with a low-
dropout regulator (LDO).
If EN/UVLO is less than ~0.7V, both the buck and LDO
are off, the output is disconnected and the input current
is less than 2糀. The buck turns on when EN/UVLO is
greater than 1.23V. An undervoltage lockout (UVLO)
turns the buck and LDO off when V
IN
 is less than 3.4V.
An overvoltage lockout (OVLO) turns the buck and LDO
off when V
IN
 is greater than 38.5V. The part will withstand
nonrepetitive one second input voltage transients up to
55V. An internal thermal shutdown circuit monitors the die
temperature and shuts both the buck and LDO off if the
die temperature exceeds ~160癈. The thermal shutdown
has 10 degrees of hysteresis.
An internal regulator provides power to the control circuitry
and produces the 0.8V feedback voltage for the buck and
LDO error ampli ers.
An internal,  xed-frequency oscillator in the step-down
regulator enables an RS ip-op, turning on the internal
power switch Q1. A comparator monitors the current
owing between the V
IN
 and SW pins, turning the switch
off when this current reaches a level determined by the
voltage at V
C
 and the internal slope-compensation. An error
amplier servos the V
C
 node. The output of an external
resistor divider between OUT and ground is tied to the
V
FB
 pin and presented to the negative error amp input.
The positive input to the error amp is a 0.8V reference, so
the voltage loop forces the V
FB
 pin to 0.8V. The reference
voltage of the buck error ampli er is ramped over 900約
during the soft-start period. When V
C
 rises, it results in an
increase in output current, and when V
C
 falls, it results in
less output current. Current limit is provided by an active
clamp on the V
C
 node.
The buck power switch (Q1) is driven from the BOOST
pin. An external capacitor and internal diode are used to
generate a voltage at the BOOST pin that is higher than the
input supply, which allows the driver to fully saturate the
internal bipolar NPN power switch for ef cient operation.
An external diode can be used to make the BOOST drive
more effective at low output voltages.
The oscillator reduces the LT3645s operating frequency
during the soft-start period. This frequency foldback helps
to control the output current during startup.
The current in the external catch diode (D1) is sensed
through the DA pin. If the catch diode current exceeds
0.9A, the oscillator frequency is decreased. This prevents
current runaway during startup or overload.
The LDO only operates if EN/UVLO is greater than 1.23V
and EN2 is greater than 1.3V. If EN/UVLO is low and EN2
is high, the LDO will not start. When EN2 > 1.3V and EN/
UVLO > 1.23V, the LDO power transistor will turn on and
regulate the output at the OUT2 pin. An error ampli er
driving Q2 has its positive input at the 0.797V reference.
The output of an external resistor divider between OUT2
and ground is tied to the V
FB2
 pin and presented to the
negative error amp input, forcing the V
FB2
 pin to 0.797V.
The reference voltage of the LDO error ampli er is ramped
over 600約 during the soft-start period. The LDO power
transistor (Q2) is driven from the V
IN
 pin. Q2 is a bipolar
NPN which draws its collector current from the V
CC2
 pin.
The NPG pin is an open-collector output that indicates
when both buck and LDO outputs are in at least 90% in
regulation. When FB and FB2 rise above 720mV, the NPG
pin is pulled low.
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