參數(shù)資料
型號: LT3645HMSE#TRPBF
廠商: Linear Technology
文件頁數(shù): 16/24頁
文件大小: 300K
描述: IC REG DL BUCK/LINEAR 12-MSOP
標準包裝: 2,500
拓撲: 降壓(降壓)(1),線性(LDO)(1)
功能: 車載
輸出數(shù): 2
頻率 - 開關: 750kHz
電壓/電流 - 輸出 1: 0.8 V ~ 16 V,500mA
電壓/電流 - 輸出 2: 0.8 V ~ 8 V,200mA
帶 LED 驅(qū)動器:
帶監(jiān)控器:
帶序列發(fā)生器:
電源電壓: 3.6 V ~ 36 V
工作溫度: -40°C ~ 150°C
安裝類型: 表面貼裝
封裝/外殼: 12-TSSOP (0.118",3.00mm 寬)裸露焊盤
供應商設備封裝: 12-MSOP,裸露焊盤
包裝: 帶卷 (TR)
LT3645
16
3645f
temperature range. The X5R and X7R dielectrics result in
more stable characteristics and are more suitable for use
as the output capacitor. The X7R type has better stability
across temperature, while the X5R is less expensive and
is available in higher values. Care still must be exercised
when using X5R and X7R capacitors; the X5R and X7R
codes only specify operating temperature range and maxi-
mum capacitance change over temperature. Capacitance
change due to DC bias with X5R and X7R capacitors
is better than Y5V and Z5U capacitors, but can still be
signi cant enough to drop capacitor values below ap-
propriate levels. Capacitor DC bias characteristics tend to
improve as component case size increases, but expected
capacitance at operating voltage should be veri ed. Voltage
and temperature coef cients are not the only sources of
problems. Some ceramic capacitors have a piezoelectric
response. A piezoelectric device generates voltage across
its terminals due to mechanical stress, similar to the way
a piezoelectric microphone works. For a ceramic capacitor
the stress can be induced by vibrations in the system or
thermal transients.
Precision Undervoltage Lockout
The EN/UVLO pin has an accurate 1.23V threshold that
can be used to shutdown the part when the input voltage
drops below a speci ed level. To perform this function, a
resistor divider between the EN/UVLO pin and the V
IN
 pin
can be tied as shown in Figure 10. The resistor values can
be determined from the following equation:
 
 
R7R8
V
IN(MIN)
1.23V
1
With the resistor divider connected, the part will only
operate at input voltages greater than V
IN(MIN)
. Note that
the resistor divider will always draw current from V
IN
. To
reduce this current, the user might use large value resis-
tors for R7 and R8. This is acceptable as long as R7 and
R8 are selected such that they can supply 10糀 to the
EN/UVLO pin. A good value for R8 is 100k.
Output Voltage Sequencing
There are a few applications available for sequencing the
buck and LDO output voltages. In Figures 11 and 12, the
buck output (OUT1) is programmed to 3.3V, while the LDO
output (OUT2) is programmed to 1.8V.
Figure 11 shows a standard con guration where OUT1 and
OUT2 come up as soon as possible. In this con guration,
APPLICATIONS INFORMATION
Figure 10. Precision UVLO Circuit
Figure 11. OUT1 and OUT2 Come Up as Soon as Possible
3645 F10
GND
V
IN
V
IN
EN/UVLO
R7
LT3645
R8
3645 F11
SW
4.7糎
31.6K
OUT1
OUT2
10糉
10K
DA
V
CC2
EN2
FB
OUT2
FB2
EN/UVLO
20V/DIV
OUT1
5V/DIV
OUT2
2V/DIV
NPG
5V/DIV
500約/DIV
12.4k
2.2糉
10k
LT3645
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