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LT3581
3581f
applicaTions inForMaTion
Figure 5. Boost Converter – The Component Values and Voltages
Given Are Typical Values for a 2MHz, 5V to 12V Boost
BOOST CONVERTER COMPONENT SELECTION
D1
20V, 2A
VIN
5V
RGATE
6.04k
RFAULT
100k
RFB
130k
RT
43.2k
CIN
4.7F
L1
1.5H
CC
1nF
COUT2
4.7F
3581 F05
CSS
0.1F
RC
10.5k
COUT1
4.7F
VOUT
12V
IOUT < 0.83A
SW1 SW2
FB
CLKOUT
GATE
VC
SS
VIN
RT
GND
SYNC
FAULT
SHDN
LT3581
CF
56pF
OPTIONAL
PMOS
The LT3581 can be configured as a Boost converter as
in Figure 5. This topology allows for positive output volt-
ages that are higher than the input voltage. An external
PMOS (optional) driven by the GATE pin of the LT3581 can
achieve input or output disconnect during a fault event.
A single feedback resistor sets the output voltage. For
output voltages higher than 40V, see the Charge Pump
Aided Regulators section.
Table 1 is a step-by-step set of equations to calculate
component values for the LT3581 when operating as a
boost converter. Input parameters are input and output
voltage, and switching frequency (VIN, VOUT and fOSC re-
spectively). Refer to the Appendix for further information
on the design equations presented in Table 1.
Variable Definitions:
VIN = Input Voltage
VOUT = Output Voltage
DC = Power Switch Duty Cycle
fOSC = Switching Frequency
IOUT = Maximum Average Output Current
IRIPPLE = Inductor Ripple Current
RDSON_PMOS = RDSON of External PMOS (set to 0 if not
using PMOS)
Table 1. Boost Design Equations
PARAMETERS/EQUATIONS
Step 1:
Inputs
Pick VIN, VOUT, and fOSC to calculate equations below.
Step 2:
DC
DC
V
OUT
IN
OUT
+
–
.
– .
0 5
0 3
Step 3:
L1
L
V
V DC
f
A
L
V
TYP
IN
OSC
MIN
IN
= (
)
= (
)
– .
0 3
1
0 3
2 DDC
A f
DC
L
V
V DC
f
OSC
MAX
IN
O
–
.
–
– .
1
2 2
1
0 3
(
)
(
)
= (
)
SSC
A
0 35
.
(1)
(2)
(3)
Pick L1 out of a range of inductor values where the minimum
value of the range is set by LTYP or LMIN, whichever is higher.
The maximum value of the range is set by LMAX. See appendix
on how to choose current rating for inductor value chosen.
Step 4:
IRIPPLE
I
V
V DC
f
L
RIPPLE
IN
OSC
= (
)
– .
0 3
1
Step 5:
IOUT
I
A
I
DC
OUT
RIPPLE
=
(
)
3 3
2
1
.
–
Step 6:
D1
V
I
R
OUT AVG
OUT
>
;
Step 7:
COUT1,
COUT2
C
I
DC
f
V
I
OUT
OSC
OUT
1
2
0 01
0 50
=
≥
.
– .
RRDSON PMOS
_
If PMOS is not used, then use just one capacitor where
COUT = COUT1 + COUT2.
Step 8:
CIN
C
A DC
f
V
I
IN
VIN
PWR
OSC
IN
RIP
≥
+
≥
+
3 3
45
0 005
.
PPLE
OSC
IN
f
V
8
0 005
.
Refer to Input Capacitor Selection in Appendix for definition of
CVIN and CPWR.
Step 9:
RFB
R
V
A
FB
OUT
=
– .
.
1 215
83 3
Step 10:
RT
R
f
in MHz and R in k
T
OSC
T
=
87 6
1
.
– ;
Step 11:
PMOS
Only needed for input or output disconnect. See PMOS Selection
in the Appendix for information on sizing the PMOS, RGATE and
picking appropriae UVLO components.
Note 1: The maximum design target for peak switch current is 3.3A and is
used in this table.
Note 2: The final values for COUT1, COUT2 and CIN may deviate from the
above equations in order to obtain desired load transient performance.