參數(shù)資料
型號(hào): LT1994HDD#PBF
廠商: Linear Technology
文件頁(yè)數(shù): 3/20頁(yè)
文件大小: 0K
描述: IC DIFF AMP/DRIVER LN-LD 8-DFN
標(biāo)準(zhǔn)包裝: 121
放大器類型: 差分
電路數(shù): 1
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 65 V/µs
增益帶寬積: 70MHz
電流 - 輸入偏壓: 18µA
電壓 - 輸入偏移: 3000µV
電流 - 電源: 14.8mA
電流 - 輸出 / 通道: 85mA
電壓 - 電源,單路/雙路(±): 2.375 V ~ 12.6 V,±1.188 V ~ 6.3 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-WFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 8-DFN-EP(3x3)
包裝: 管件
11
1994fb
LT1994
General Amplier Applications
As levels of integration have increased and, correspond-
ingly, system supply voltages decreased, there has been
a need for ADCs to process signals differentially in order
to maintain good signal-to-noise ratios. These ADCs are
typically supplied from a single-supply voltage that can
be as low as 2.5V and will have an optimal common mode
input range near mid-supply. The LT1994 makes interfac-
ing to these ADCs trivial, by providing both single-ended
to differential conversion as well as common mode level
shifting. Figure 1 shows a general single-supply application
with perfectly matched feedback networks from OUT+ and
OUT. The gain to VOUTDIFF from VINM and VINP is:
VV
V
R
VV
OUTDIFF
OUT
F
I
INP
INM
=≈
()
+
Note from the above equation that the differential output
voltage (VOUT+ – VOUT–) is completely independent of
input and output common mode voltages, or the voltage
at the common mode pin. This makes the LT1994 ideally
suited pre-amplication, level shifting, and conversion
of single-ended signals to differential output signals in
preparation for driving differential input ADCs.
Effects of Resistor Pair Mismatch
Figure 2 shows a circuit diagram that takes into consid-
eration that real world resistors will not perfectly match.
Assuming innite open-loop gain, the differential output
relationship is given by the equation:
VV
V
R
V
VV
OUTDIFF
OUT
F
I
INDIFF
AVG
ICM
AVG
OCM
=
+
ΔΔ
+
,
β
where:
RF is the average of RF1 and RF2, and RI is the average
of RI1 and RI2.
βAVG is dened as the average feedback factor (or gain)
from the outputs to their respective inputs:
βAVG
I
IF
I
IF
R
RR
R
RR
=
+
1
2
22
1
11
Δβ is dened as the difference in feedback factors:
Δ=
++
β
R
RR
R
RR
I
IF
I
IF
2
22
1
11
Figure 1. Test Circuit
Figure 2. Real-World Application
VOCM
0.1μF
1994 F01
RI
RF
RL
V+
0.1μF
VCM
VSHDN
VINM
VINP
VOUTCM
3
7
6
8
1
2
5
4
V
VOUT
+
VIN
VOUT
VIN
+
RBAL
0.1μF
RI
RF
RL
+
+
LT1994
VOCM
1994 F02
RI2
RF2
RL
VS
VSHDNB
VINM
VINP
+
+
3
7
6
8
1
2
5
4
LT1994
VOCM
VOUT
+
VIN
VOUT
VIN
+
0.1μF
RI1
RF1
RL
SHDN
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