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參數(shù)資料
| 型號： | LT1969CMS#TR |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 9/20頁 |
| 文件大小： | 0K |
| 描述： | IC OP-AMP ADJ CURRNT DUAL 10MSOP |
| 標準包裝： | 2,500 |
| 放大器類型： | 通用 |
| 電路數(shù)： | 2 |
| 轉(zhuǎn)換速率： | 200 V/µs |
| 增益帶寬積： | 700MHz |
| 電流 - 輸入偏壓： | 1.5µA |
| 電壓 - 輸入偏移： | 1000µV |
| 電流 - 電源： | 7mA |
| 電流 - 輸出 / 通道： | 700mA |
| 電壓 - 電源，單路/雙路(±)： | 4 V ~ 13 V，±2 V ~ 6.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-MSOP |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | LT1969CMSTR |
17
LT1969
Using CTRL1 and CTRL2 to set the supply current effec-
tively places R1 and R2 in parallel obtaining a net resis-
tance, and Figure 12 can still be utilized in determining
supply current.
The use of two pins to control the supply current allows
for applications where external logic can be used to place
the amplifiers in different supply current modes. Figure
13 illustrates a partial shutdown with direct logic on each
control pin. If both logic inputs are low, the control pins
will effectively see a resistance of 13k//49.9k = 10k to
V –. This will set the amplifiers in nominal mode with a
gain bandwidth of 700MHz and
±200mA minimum IOUT.
The electrical characteristics are specified in nominal
mode. Forcing R1’s input logic high will partially shut
down the part, putting it in a low power mode. By keeping
the output stage slightly biased, the output impedance
–
+
6
CTRL1
V–
V+
R1
7
5
1
CTRL2
R2
1969 F11
V–
Figure 11
RESISTANCE (k
)
0
I CC
,BOTH
AMPLIFIERS
(mA)
10
20
30
5
15
25
20
40
60
80
1969 F12
100
10
030
50
70
90
VS = ±6V
TA = 25°C
Figure 12. Supply Current vs Control Resistance (R1//R2)
remains low, preserving the line termination. The Typical
Performance Characteristics curve Output Impedance vs
Supply Current shows the details. Both logic inputs high
further reduces the supply current and places the part in
a “standby” mode with less than 500
A per amplifier
quiescent current.
Output Loading in Low Current Modes
The LT1969 output stage has a very wide bandwidth and
is able to source and sink large amounts of current. The
internal circuitry of the output stage incorporates a posi-
tive feedback boost loop giving it high drive capability. As
the supply current is reduced, the sourcing drive capability
also reduces. Maximum sink current is independent of
supply current and is limited by the short-circuit protec-
tion at 500mA. If the amplifier is in a low power or
“standby” mode, the output stage is slightly biased and is
not capable of sourcing high output currents. The Typical
Performance Characteristics curve Maximum IOUT Sourc-
ing vs Quiescent Current shows the maximum output
current for a given quiescent current.
Considerations for Fault Protection
The basic line driver design presents a direct DC path
between the outputs of the two amplifiers. An imbalance
in the DC biasing potentials at the noninverting inputs
through either a fault condition or during turn-on of the
system can create a DC voltage differential between the
two amplifier outputs. This condition can force a consid-
erable amount of current, 500mA or more, to flow as it is
limited only by the small valued back-termination resis-
tors and the DC resistance of the transformer primary.
This high current can possibly cause the power supply
voltage source to drop significantly impacting overall
6
CTRL1
R1
7
CTRL2
R2
ON
OFF
1969 F13
OFF
3.3V/5V FROM V–
Figure 13
APPLICATIO S I FOR ATIO
WU
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