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參數(shù)資料
| 型號： | LT1761ES5-2.5 |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | 100mA, Low Noise, LDO Micropower Regulators in SOT-23 |
| 中文描述： | 2.5 V FIXED POSITIVE LDO REGULATOR, 0.45 V DROPOUT, PDSO5 |
| 封裝： | PLASTIC, MO-193, TSOT-23, 5 PIN |
| 文件頁數(shù)： | 13/16頁 |
| 文件大?。?/td> | 246K |
| 代理商： | LT1761ES5-2.5 |
13
LT1761 Series
equal to 1.22V/R1 and the current in R2 is the current in R1
plus the ADJ pin bias current. The ADJ pin bias current,
30nA at 25
°
C, flows through R2 into the ADJ pin. The
output voltage can be calculated using the formula in
Figure 1. The value of R1 should be no greater than 250k
to minimize errors in the output voltage caused by the ADJ
pin bias current. Note that in shutdown the output is turned
off and the divider current will be zero. Curves of ADJ
Pin Voltage vs Temperature and ADJ Pin Bias Current
vs Temperature appear in the Typical Performance
Characteristics.
The adjustable device is tested and specified with the ADJ
pin tied to the OUT pin for an output voltage of 1.22V.
Specifications for output voltages greater than 1.22V will
be proportional to the ratio of the desired output voltage to
1.22V: V
OUT
/1.22V. For example, load regulation for an
output current change of 1mA to 100mA is –1mV typical
at V
OUT
= 1.22V. At V
OUT
= 12V, load regulation is:
(12V/1.22V)(–1mV) = –9.8mV
IN
1761 F01
R2
LT1761
OUT
V
IN
V
OUT
ADJ
GND
R1
+
V
V
R
R
I
R
V
V
I
nA
OUT
ADJ
ADJ
ADJ
OUTPUT RANGE = 1.22V TO 20V
=
+
+
(
1
)( )
=
=
°
1 22
.
1
2
2
1 22
30
AT 25 C
Figure 1. Adjustable Operation
APPLICATIU
W
U
U
Bypass Capacitance and Low Noise Performance
The LT1761 regulators may be used with the addition of a
bypass capacitor from V
OUT
to the BYP pin to lower output
voltage noise. A good quality low leakage capacitor is rec-
ommended. This capacitor will bypass the reference of the
regulator, providing a low frequency noise pole. The noise
pole provided by this bypass capacitor will lower the out-
put voltage noise to as low as 20
μ
V
RMS
with the addition
of a 0.01
μ
F bypass capacitor. Using a bypass capacitor
has the added benefit of improving transient response.
With no bypass capacitor and a 10
μ
F output capacitor, a
10mA to 100mA load step will settle to within 1% of its final
value in less than 100
μ
s. With the addition of a 0.01
μ
F
bypass capacitor, the output will stay within 1% for a 10mA
to 100mA load step (see LT1761-5 Transient Reponse in
Typical Performance Characteristics section). However,
regulator start-up time is inversely proportional to the size
of the bypass capacitor, slowing to 15ms with a 0.01
μ
F
bypass capacitor and 10
μ
F output capacitor.
Output Capacitance and Transient Response
The LT1761 regulators are designed to be stable with a
wide range of output capacitors. The ESR of the output
capacitor affects stability, most notably with small
capacitors. A minimum output capacitor of 1
μ
F with an
ESR of 3
or less is recommended to prevent oscilla-
tions. The LT1761-X is a micropower device and output
transient response will be a function of output capaci-
tance. Larger values of output capacitance decrease the
peak deviations and provide improved transient response
for larger load current changes. Bypass capacitors, used
to decouple individual components powered by the
LT1761-X, will increase the effective output capacitor
value. With larger capacitors used to bypass the refer-
ence (for low noise operation), larger values of output
capacitors are needed. For 100pF of bypass capacitance,
2.2
μ
F of output capacitor is recommended. With a 330pF
bypass capacitor or larger, a 3.3
μ
F output capacitor is
recommended. The shaded region of Figure 2 defines the
region over which the LT1761 regulators are stable. The
minimum ESR needed is defined by the amount of
bypass capacitance used, while the maximum ESR is 3
.
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior across
temperature and applied voltage. The most common
Figure 2. Stability
OUTPUT CAPACITANCE (
μ
F)
1
E
)
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
3
10
1761 F02
2
4
5
6 7 8 9
STABLE REGION
C
BYP
= 330pF
C
BYP
= 100pF
C
BYP
= 0
C
BYP
> 3300pF
相關(guān)PDF資料 |
PDF描述 |
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| LT1761ES5-2.8 | 100mA, Low Noise, LDO Micropower Regulators in SOT-23 |
| LT1761ES5-3 | 100mA, Low Noise, LDO Micropower Regulators in SOT-23 |
| LT1761ES5-3.3 | 100mA, Low Noise, LDO Micropower Regulators in SOT-23 |
| LT1761ES5-5 | 100mA, Low Noise, LDO Micropower Regulators in SOT-23 |
| LT1761ES5-BYP | 100mA, Low Noise, LDO Micropower Regulators in SOT-23 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LT1761ES5-2-PBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:100mA, Low Noise, LDO Micropower Regulators in TSOT-23 |
| LT1761ES5-2-TR | 制造商:LINER 制造商全稱:Linear Technology 功能描述:100mA, Low Noise, LDO Micropower Regulators in TSOT-23 |
| LT1761ES5-2-TRPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:100mA, Low Noise, LDO Micropower Regulators in TSOT-23 |
| LT1761ES5-3 | 制造商:Linear Technology 功能描述:LDO Regulator Pos 3V 0.1A 5-Pin TSOT-23 |
| LT1761ES5-3#PBF | 制造商:Linear Technology 功能描述:LDO Regulator Pos 3V 0.1A 5-Pin TSOT-23 |
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