參數(shù)資料
型號: LT1715CMS#TRPBF
廠商: Linear Technology
文件頁數(shù): 3/20頁
文件大?。?/td> 0K
描述: IC COMPARATOR 150MHZ DUAL 10MSOP
標(biāo)準(zhǔn)包裝: 2,500
系列: UltraFast™
類型: 通用
元件數(shù): 2
輸出類型: CMOS,滿擺幅,TTL
電壓 - 電源,單路/雙路(±): 2.7 V ~ 12 V
電壓 - 輸入偏移(最小值): 2.5mV @ ±5V
電流 - 輸入偏壓(最小值): 6µA @ ±5V
電流 - 輸出(標(biāo)準(zhǔn)): 20mA
電流 - 靜態(tài)(最大值): 2mA
CMRR, PSRR(標(biāo)準(zhǔn)): 70dB CMRR,80dB PSRR
傳輸延遲(最大): 9ns
磁滯: 6mV
工作溫度: 0°C ~ 70°C
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
安裝類型: 表面貼裝
包裝: 帶卷 (TR)
LT1715
11
1715fa
APPLICATIONS INFORMATION
The ground trace from Pin 6 runs under the device up
to the bypass capacitor, shielding the inputs from the
outputs. Note the use of a common via for the LT1715
and the bypass capacitors, which minimizes interference
from high frequency energy running around the ground
plane or power distribution traces.
The supply bypass should include an adjacent 10nF ceramic
capacitor and a 2.2μF tantalum capacitor no farther than
5cm away; use more capacitance on +VS if driving more
than 4mA loads. To prevent oscillations, it is helpful to
balance the impedance at the inverting and noninverting
inputs; source impedances should be kept low, preferably
1kΩ or less.
The outputs of the LT1715 are capable of very high slew
rates. To prevent overshoot, ringing and other problems
with transmission line effects, keep the output traces
shorter than 10cm, or be sure to terminate the lines
to maintain signal integrity. The LT1715 can drive DC
terminations of 200Ω or more, but lower characteristic
impedance traces can be used with series termination or
AC termination topologies.
Channel Interactions
The LT1715’s two channels are designed to be entirely
independent. However, at frequencies approaching and
exceeding 100MHz, bond wire inductance begins to
interfere with overlapping switching edges on the two
channels. Figure 3 shows one channel of the comparator
toggling at 100MHz with the other channel driven low
with the scope set to display innite persistence. Jitter is
almost nonexistent. Figure 4 displays the same channel
at 100MHz with innite persistence, but the other channel
ofthe comparator is toggling as well at frequencies swept
from 60MHz to 160MHz. Jitter will occur as rising and fall-
ing edges align for any non harmonic or non fundamental
frequency of the high frequency signal.
At frequencies well beyond 100MHz, the toggling of one
channel may be impaired by toggling on the other. This
is a rather complex interaction of supply bypassing and
bond inductance, and it cannot be entirely prevented.
However, good bypassing and board layout techniques
will effectively minimize it.
Power Supply Sequencing
The LT1715 is designed to tolerate any power supply
sequencing at system turn-on and power down. In any
of the previously shown power supply congurations, the
various supplies can activate in any order without exces-
sive current drain by the LT1715.
As always, the Absolute Maximum Ratings must not be
exceeded, either on the power supply terminals or the
input terminals. Power supply sequencing problems can
occur when input signals are powered from supplies that
are independent of the LT1715’s supplies. No problems
should occur if the input signals are powered from the
same VCC and VEE supplies as the LT1715.
Figure 4. 100MHz Jitter with Both Channels Driven
Figure 3. Clean 100MHz Toggling
5ns/DIV
1715 F03
–5V
0V
1V/DIV
OUT A
5ns/DIV
1715 F04
–5V
0V
1V/DIV
OUT A
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