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參數(shù)資料
型號: LT1671CMS8#PBF
廠商: Linear Technology
文件頁數(shù): 4/12頁
文件大?。?/td> 0K
描述: IC COMPARATOR 60NS LOW PWR 8MSOP
標(biāo)準(zhǔn)包裝: 50
類型: 帶鎖銷
元件數(shù): 1
輸出類型: CMOS,補(bǔ)充型,TTL
電壓 - 輸入偏移(最小值): 2.5mV @ ±5V
電流 - 輸入偏壓(最小值): 0.28µA @ ±5V
電流 - 輸出(標(biāo)準(zhǔn)): 20mA
電流 - 靜態(tài)(最大值): 800µA
CMRR, PSRR(標(biāo)準(zhǔn)): 100dB CMRR,85dB PSRR
傳輸延遲(最大): 80ns
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
安裝類型: 表面貼裝
包裝: 管件
12
LT1671
LINEAR TECHNOLOGY CORPORATION 1998
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX:(408)434-0507 q www.linear-tech.com
1671fs, sn1671 LT/TP 0499 4K PRINTED IN USA
TYPICAL APPLICATION
U
PART NUMBER
DESCRIPTION
COMMENTS
LT1016
UltraFast
TM Precision Comparator
Industry Standard 10ns Comparator
LT1116
12ns Single Supply Ground-Sensing Comparator
Single Supply Version of LT1016
LT1394
UltraFast Single Supply Comparator
7ns, 6mA Single Supply Comparator
LT1720
UltraFast Dual Single Supply Comparator
Dual 4.5ns, 4mA Single Supply Comparator
UltraFast is a trademark of Linear Technology Corporation.
RELATED PARTS
4MHz Adaptive Trigger Circuit
Line and fiber-optic receivers often require an adaptive
trigger to compensate for variations in signal amplitude
and DC offsets. The circuit in Figure 9 triggers on 2mV to
175mV signal from 100Hz to 4MHz while operating from
a single 5V rail. A1, operating at a gain of 15, provides
wideband AC gain. The output of this stage biases a 2-way
peak detector (Q1 through Q4). The maximum peak is
stored in Q2’s emitter capacitor, while the minimum
excursion is retained in Q4’s emitter capacitor. The DC
value of the midpoint of A1’s output signal appears at the
junction of the 500pF capacitor and the 3M
units. This
point always sits midway between the signal’s excursions,
regardless of absolute amplitude. This signal-adaptive
voltage is buffered by A2 to set the trigger voltage at the
Figure 9. 4MHz Single Supply Adaptive Trigger. Output Comparator’s Threshold Varies Ratiometrically with
Input Amplitude, Maintaining Data Integrity over >85:1 Input Amplitude Range
LT1671’s positive input. The LT1671’s negative input is
biased directly from A1’s output. The LT1671’s output, the
circuit’s output, is unaffected by > 85:1 signal amplitude
variations. Bandwidth limiting in A1 does not affect trig-
gering because the adaptive trigger threshold varies
ratiometrically to maintain circuit output.
Figure 10 shows operating waveforms at 4MHz. Trace A’s
input produces Trace B’s amplified output at A1. The
comparator’s output is Trace C.
5V
+
A1
LT1227
+
A2
LT1006
INPUT
5V
TRIGGER
OUT
1671 F09
500pF
0.1
F
510
470
470
750
36
1
3
2
4
14
13
15
5
6
12
10
11
2k
10
F
2k
+
0.1
F
0.1
F
0.005
F
0.005
F
100
F
+
Q1, Q2, Q3, Q4 = CA3096 ARRAY: TIE SUBSTRATE (PIN 16) TO GROUND
= 1N4148
+
LT1671
Q1
Q2
Q3
Q4
3M
Figure 10. Adaptive Trigger
Responding to a 4MHz, 5mV Input.
Input Amplitude Variations from 2mV
to 175mV Are Accommodated
A = 10mV/DIV
B = 50mV/DIV
C = 1mV/DIV
50ns/DIV
1671F10
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