參數(shù)資料
型號: LT1578IS8-2.5
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: RADIATION HARDENED HIGH EFFICIENCY, 5 AMP SWITCHING REGULATORS
中文描述: SWITCHING REGULATOR, 240 kHz SWITCHING FREQ-MAX, PDSO8
封裝: 0.150 INCH, PLASTIC, SO-8
文件頁數(shù): 21/28頁
文件大?。?/td> 286K
代理商: LT1578IS8-2.5
21
LT1578/LT1578-2.5
APPLICATIO
S I
FOR
ATIO
U
Analog experts will note that around 7kHz, phase dips
close to the zero phase margin line. This is typical of
switching regulators, especially those that operate over a
wide range of loads. This region of low phase is not a
problem as long as it does not occur near unity-gain. In
practice, the variability of output capacitor ESR tends to
dominate all other effects with respect to loop response.
Variations in ESR willcause unity-gain to move around,
but at the same time phase moves with it so that adequate
phase margin is maintained over a very wide range of ESR
(
±
3:1).
W
U
U
What About a Resistor in the Compensation Network
It is common practice in switching regulator design to add
a “zero” to the error amplifier compensation to increase
loop phase margin. This zero is created in the external
network in the form of a resistor (R
C
) in series with the
compensation capacitor. Increasing the size of this resis-
tor generally creates better and better loop stability, but
there are two limitations on its value. First, the combina-
tion of output capacitor ESR and a large value for R
C
may
cause loop gain to stop rolling off altogether, creating a
gain margin problem. An approximate formula for R
C
where gain margin falls to zero is:
R Loop
V
G
G
ESR
OUT
MP
MA
Gain =1
(
)
=
(
)(
)(
)
1 21
G
MP
= Transconductance of power stage = 1.5A/V
G
MA
= Error amplifier transconductance = 1(10
–3
)
ESR = Output capacitor ESR
1.21 = Reference voltage
With V
OUT
= 5V and ESR = 0.1
, a value of 27.5k for R
C
would yield zero gain margin, so this represents an upper
limit. There is a second limitation however which has
nothing to do with theoretical small signal dynamics. This
resistor sets high frequency gain of the error amplifier,
including the gain at the switching frequency. If the
switching frequency gain is high enough, an excessive
amout of output ripple voltage will appear at the V
C
pin
resulting in improper operation of the regulator. In a
marginal case, subharmonicswitching occurs, as
evidenced by alternating pulse widths seen at the switch
node. In more severe cases, the regulator squeals or
hisses audibly even though the output voltage is still
roughly correct. None of this will show on a Bode plot
since this is an amplitude insensitive measurement. Tests
have shown that if ripple voltage on the V
C
is held to less
than 100mV
P-P
, he LT1578 will generally be well behaved
The formula below will give an estimate of V
C
ripple
voltage when R
C
is added to the loop, assuming that R
C
is
large compared to the reactance of C
C
at 200kHz.
)
=
( )(
V
R
G
V
V
ESR
)(
V
L f
C RIPPLE
C
MA
IN
( )( )( )
OUT
IN
)
(
)(
)
1 21
G
MA
= Error amplifier transconductance (1000
μ
Mho)
If a series compensation resistor of 15k gave the best
overall loop response, with adequate gain margin, the
resulting V
C
pin ripple voltage with V
IN
= 10V, V
OUT
= 5V,
ESR = 0.1
, L = 30
μ
H, would be:
=
(
( )
(
V
k
V
C RIPPLE
)
)
(
)
(
)( )(
200 10
)
)(
)
=
15
1 10
10 5 0 1 1 21
0 151
.
3
6
3
.
.
This ripple voltage is high enough to possibly create
subharmonic switching. In most situations a compromise
value (<10k in this case) for the resistor gives acceptable
phase margin and no subharmonic problems. In other
cases, the resistor may have to be larger to get acceptable
phase response, and some means must be used to control
ripple voltage at the V
C
pin. The suggested way to do this
is to add a capacitor (C
F
) in parallel with the R
C
/C
C
network
on the V
C
pin. The pole frequency for this capacitor is
typically set at one-fifth of the switching frequency so that
it provides significant attenuation of the switching ripple,
but does not add unacceptable phase shift at the loop
unity-gain frequency. With R
C
= 15k,
C
f R
k
pF
F
C
=
( )( )( )
=
(
)
(
)
=
5
2
5
2
200 10
15
265
3
π
π
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