參數(shù)資料
型號: LT1394CS8#TRPBF
廠商: Linear Technology
文件頁數(shù): 4/16頁
文件大小: 0K
描述: IC COMPARATOR LOW PWR 7NS 8-SOIC
標(biāo)準(zhǔn)包裝: 2,500
系列: UltraFast™
類型: 帶鎖銷
元件數(shù): 1
輸出類型: CMOS,補充型,TTL
電壓 - 輸入偏移(最小值): 2.5mV @ ±5V
電流 - 輸入偏壓(最小值): 4.5µA @ ±5V
電流 - 輸出(標(biāo)準(zhǔn)): 20mA
電流 - 靜態(tài)(最大值): 8.5mA
CMRR, PSRR(標(biāo)準(zhǔn)): 100dB CMRR,100dB PSRR
傳輸延遲(最大): 9ns
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
安裝類型: 表面貼裝
包裝: 帶卷 (TR)
12
LT1394
Figure 12. Voltage-Controlled Delay’s Waveforms.
Programming Voltage Determines Delay Between Input
(Trace A) Falling Edge and Output (Trace D) Rising Edge.
High Linearity Timing Ramp (Trace B) Permits 1ns
Accuracy and 100ps Repeatability
10ns/DIV
1394 F13
Figure 13. High Speed Expansion of Figure 12. Ramp
(Trace B) Begins When Trigger (Trace A) Falls and
Current Source Turns On (Trace C). Trace D is Output
10ns/DIV
1394 F14
B = 1V/DIV
C = 0.1V/DIV
D = 1V/DIV
A = 1V/DIV
Figure 14. Delay’s Output Switching Begins with
Trigger Falling Low (Trace A). Ramp (Trace C) Starts
3ns After Current Source Turn-On (Trace D). Output
(Trace B) Begins 4ns Later
C = 5V/DIV
D = 5V/DIV
B = 2V/DIV
A = 5V/DIV
100ns/DIV
1394 F12
A = 2V/DIV
B = 0.1V/DIV
C = 2V/DIV
D = 2V/DIV
APPLICATIONS INFORMATION
WU
U
delay programming voltage. The fast switching and ramp
linearity permits 1ns accuracy and 100ps repeatability.
Figure 13, a high speed expansion of the current source
turn-on, details the clean switching. Q4 goes off within 2ns
of the trigger input (Trace A) dropping low, enabling the
current source (Q2’s emitter is Trace C). Concurrently, the
1000pF capacitor’s ramp (Trace B) begins. The LT1394’s
output (Trace D) drops low about 7ns later, returning high
after crossing (in this case) a relatively low programming
voltage. Figure 14 juxtaposes the waveforms differently,
permitting enhanced study of circuit timing. Switching
begins with the input trigger falling low (Trace A). The ramp
(Trace C) begins 3ns after the current source turns on (Q2
emitter is Trace D). The output pulse (Trace B) begins
about 4ns later.
To calibrate this circuit apply a trigger input and 3V to the
programming input. Adjust the 100
trim for a 300ns
width at the LT1394’s output.
+
LT1394
5V
0.1
F
1394 F11
DELAY PROGRAMMING
VOLTAGE INPUT
0V TO 3V = 0 TO 300ns DELAY
1000pF
TRIGGER INPUT
200ns MINIMUM
1k
330
330
100
LT1634
PNP = 2N5087
NPN = 2N2369
220
100
(DELAY
CALIB)
51pF
0.1
F
Q1
Q2
Q OUTPUT
Q4
Q3
Figure 11. Fast, Precise, Voltage-Controlled Delay.
Emitter Switched Current Source Has Clean,
Predictable Dynamics
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