參數(shù)資料
型號: LT1339IN
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: Octal Buffers/Drivers With 3-State Outputs 20-PDIP 0 to 70
中文描述: SWITCHING CONTROLLER, 150 kHz SWITCHING FREQ-MAX, PDIP20
封裝: 0.300 INCH, PLASTIC, DIP-20
文件頁數(shù): 12/20頁
文件大?。?/td> 415K
代理商: LT1339IN
12
LT1339
APPLICATIO
S I
N
FOR
ATIO
U
=
(
( )( )( )
W
U
L
V
V
V
I f
V
MIN
OUT
IN
OUT
O
IN
)
(
)
where f
O
= operating frequency. Given an inductor value
(L), the peak inductor current is the sum of the average
inductor current (I
AVG
)and half the inductor ripple current
(
I), or:
+
(
( )( )( )( )
I
I
V
V
V
L f
V
PK
AVG
OUT
2
IN
OUT
O
IN
=
)
(
)
The inductor core type is determined by peak current and
efficiency requirements. The inductor core must with-
stand peak current without saturating, and series winding
resistance and core losses should be kept as small as is
practical to maximize conversion efficiency.
The LT1339 peak current limit threshold is 40% greater
than the average current limit threshold. Slope compensa-
tion effects reduce this margin as duty cycle increases.
This margin must be maintained to prevent peak current
limit from corrupting the programmed value for average
current limit. Programming the peak ripple current to less
than 15% of the desired average current limit value will
assure porper operation of the average current limit
feature through 90% duty cycle (see Slope Compensation
section).
Oscillator Synchronization
The LT1339 oscillator generates a modified sawtooth
waveform at the C
T
pin between low and high thresholds
of about 0.8V (vl) and 2.5V (vh) respectively. The oscillator
can be synchronized by driving a TTL level pulse into the
SYNC pin. This inputs to a one-shot circuit that reduces the
oscillator high threshold to 2V for about 200ns. The SYNC
input signal should have minimum high/low times of
1
μ
s.
Slope Compensation
Current mode switching regulators that operate with a
duty cycle greater than 50% and have continuous inductor
current can exhibit duty cycle instability. While a regulator
will not be damaged and may even continue to function
acceptably during this type of subharmonic oscillation, an
irritating high-pitched squeal is usually produced.
The criterion for current mode duty cycle instability is met
when the increasing slope of the inductor ripple current is
less than the decreasing slope, which is the case at duty
cycles greater than 50%. This condition is illustrated in
Figure 5a. The inductor ripple current starts at I
1
, at the
beginning of each oscillator switch cycle. Current
increases at a rate S1 until the current reaches the control
trip level I
2
. The controller servo loop then disables the
main switch (and enables the synchronous switch) and
inductor current begins to decrease at a rate S2. If the
current switch point (I
2
) is perturbed slightly and
increased by
I, the cycle time ends such that the mini-
mum current point is increased by a factor of (1 + S2/S1)
to start the next cycle. On each successive cycle, this error
is multiplied by a factor of S2/S1. Therefore, if S2/S1 is
1, the system is unstable.
Subharmonic oscillations can be eliminated by augment-
ing the increasing ripple current slope (S1) in the control
loop. This is accomplished by adding an artificial ramp on
the inductor current waveform internal to the IC (with a
slope S
X
) as shown in Figure 5b. If the sum of the slopes
S1 + S
X
is greater than S2, the condition for subharmonic
oscillation no longer exists.
For a buck converter, the required additional current
waveform slope, or “Slope Compensation,” follows the
relation:
S
V
L
DC
X
IN
(
)
2
1
0.8V
1339 F04
2V
2.5V
(vl)
SYNC
V
CT
(vh)
FREE RUN
SYNCHRONIZED
Figure 4. Free Run and Synchronized Oscillator
Waveforms (at C
T
Pin)
相關PDF資料
PDF描述
LT1339ISW High Power Synchronous DC/DC Controller
LT1341 5V RS232 Transceiver with One Receiver Active in Shutdown
LT1341C Octal Buffers/Drivers With 3-State Outputs 20-PDIP 0 to 70
LT1341CG Octal Buffers/Drivers With 3-State Outputs 20-SO 0 to 70
LT1341CNW Octal Buffers/Drivers With 3-State Outputs 20-SO 0 to 70
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