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參數資料
| 型號： | LT1339IN |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Octal Buffers/Drivers With 3-State Outputs 20-PDIP 0 to 70 |
| 中文描述： | SWITCHING CONTROLLER, 150 kHz SWITCHING FREQ-MAX, PDIP20 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-20 |
| 文件頁數： | 11/20頁 |
| 文件大?。?/td> | 415K |
| 代理商： | LT1339IN |
11
LT1339
APPLICATIO
S I
N
FOR
ATIO
U
impedance of the I
AVG
pin. The integrator corner fre-
quency is typically set 1 to 2 orders of magnitude below the
oscillator frequency and follows the relation:
f
–3dB
= (3.2)(10
–6
)/C
AVG
The average current limit function can be disabled by
shorting the I
AVG
pin directly to SGND.
W
U
Soft Start Programming
The current control pin (V
C
) limits sensed inductor current
to zero at voltages less than a transistor V
BE
, to full average
current limit at V
C
= V
BE
+ 1.8V. This generates a 1.8V full
regulation range for average load current. An internal
voltage clamp forces the V
C
pin to a V
BE
– 100mV above
the SS pin voltage. This 100mV “dead zone” assures 0%
duty cycle operation at the start of the soft start cycle, or
when the soft start pin is pulled to ground. Given the
typical soft start current of 8
μ
A and a soft start timing
capacitor C
SS
, the start-up delay time to full available
average current will be:
t
SS
= (1.5)(10
5
)(C
SS
)
Boost Supply
The V
BOOST
supply is bootstrapped via an external capaci-
tor. This supply provides gate drive to the topside switch
FET. The bootstrap capacitor is charged from 12V
IN
through
a diode when the switch node is pulled low.
The diode reverse breakdown voltage must be greater than
V
IN
+ 12V
IN
. The bootstrap capacitor should be at least 100
times greater than the total input capacitance of the
topside FET. A capacitor in the range of 0.1
μ
F to 1
μ
F is
generally adequate for most applications.
Shutdown Function—Input Undervoltage Detect and
Threshold Hysteresis
The LT1339 RUN/SHDN pin uses a bandgap generated
reference threshold of about 1.25V. This precision thresh-
old allows use of the RUN/SHDN pin for both logic-level
shutdown applications and analog monitoring applica-
tions such as power supply sequencing.
Because an LT1339 controlled converter is a power trans-
fer device, a voltage that is lower than expected on the
input supply could require currents that exceed the sourc-
ing capabilities of that supply, causing the system to lock
up in an undervoltage state. Input supply start-up protec-
tion can be achieved by enabling the RUN/SHDN pin using
a resistor divider from the input supply to ground. Setting
the divider output to 1.25V when that supply is almost fully
enabled prevents the LT1339 regulator from drawing large
currents until the input supply is able to provide the
required power.
If additional hysteresis is desired for the enable function,
an external feedback resistor can be used from the LT1339
regulator output. If connection to the regulator output is
not desired, the 5V
REF
internal supply pin can be used.
Figure 3 shows a resistor connection on a 48V to 5V
converter that yields a 40V V
IN
start-up threshold for
regulator enable and also provides about 10% input
referred hysteresis.
The shutdown function can be disabled by connecting the
RUN/SHDN pin to the 12V
IN
rail. This pin is internally
clamped to 2.5V through a 20k series input resistance and
will therefore draw about 0.5mA when tied directly to 12V.
This additional current can be minimized by making the
connection through an external resistor (100k is typically
used).
Inductor Selection
The inductor for an LT1339 converter is selected based on
output power, operating frequency and efficiency require-
ments. Generally, the selection of inductor value can be
reduced to desired maximum ripple current in the inductor
(
I). For a buck converter, the minimum inductor value for
a desired maximum operating ripple current can be deter-
mined using the following relation:
10k
300k
V
OUT
5V
1339 F03
5V
REF
LT1339
2
RUN/SHDN
13
390k
V
IN
48V
OPTION 2
OPTION 1
Figure 3. Input Supply Sequencing Programming
相關PDF資料 |
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|---|---|
| LT1339ISW | High Power Synchronous DC/DC Controller |
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| LT1341CG | Octal Buffers/Drivers With 3-State Outputs 20-SO 0 to 70 |
| LT1341CNW | Octal Buffers/Drivers With 3-State Outputs 20-SO 0 to 70 |
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