VOS Input Offset Voltage Either Input 1." />
參數(shù)資料
型號(hào)： LT1189CS8#TR
廠商： Linear Technology
文件頁數(shù)： 7/12頁
文件大?。?/td> 0K
描述： IC AMP VID DIFF CURR FDBK 8SOIC
標(biāo)準(zhǔn)包裝： 2,500
應(yīng)用： 差分
電路數(shù)： 1
-3db帶寬： 35MHz
轉(zhuǎn)換速率： 220 V/µs
電流 - 電源： 13mA
電流 - 輸出 / 通道： 20mA
電壓 - 電源，單路/雙路(±)： 4.75 V ~ 16 V，±2.38 V ~ 8 V
安裝類型： 表面貼裝
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 8-SOIC
包裝： 帶卷 (TR)
LT1189
4
LT1189C
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VOS
Input Offset Voltage
Either Input
1.0
3.0
mV
(Note 4)
SOIC Package
1.0
6.0
mV
VOS /T
Input VOS Drift
5.0
V/°C
IOS
Input Offset Current
Either Input
0.2
1.5
A
IB
Input Bias Current
Either Input
±0.5
±3.5
A
Input Voltage Range
–2.5
3.5
V
CMRR
Common-Mode Rejection Ratio
VCM = – 2.5V to 3.5V
80
105
dB
PSRR
Power Supply Rejection Ratio
VS = ±2.375V to ±8V
70
90
dB
VOUT
Output Voltage Swing
VS = ±5V, RL = 1k, AV = 50
±3.7
±4.0
V
VS = ±8V, RL = 1k, AV = 50
±6.6
±7.0
VS = ±8V, RL = 300, AV = 50, (Note 3)
±6.4
±6.6
GE
Gain Error
VO = ±1V, AV = 10, RL = 1k
1.0
3.5
%
IS
Supply Current
13
17
mA
Shutdown Supply Current
Pin 5 at V–, (Note 11)
0.8
1.5
mA
IS/D
Shutdown Pin Current
Pin 5 at V–
525
A
VS = ±5V, VREF = 0V, RFB1 = 900 from pins 6 to 8, RFB2 = 100 from pin 8 to ground, RL = RFB1 + RFB2 = 1k, CL ≤ 10pF, pin 5 open.
Note 1: A heat sink may be required to keep the junction temperature below
absolute maximum when the output is shorted continuously.
Note 2: TJ is calculated from the ambient temperature TA and power dissipation
PD according to the following formulas:
LT1189MJ8, LT1189CJ8:
TJ = TA + (PD × 100°C/W)
LT1189CN8:
TJ = TA + (PD × 100°C/W)
LT1189CS8:
TJ = TA + (PD × 150°C/W)
Note 3: When RL = 1k is specified, the load resistor is RFB1 + RFB2, but when
RL = 300 is specified, then an additional 430 is added to the output such
that (RFB1 + RFB2) in parallel with 430 is RL = 300.
Note 4: VOS measured at the output (pin 6) is the contribution from both input
pair, and is input referred.
Note 5: VIN LIM is the maximum voltage between –VIN and +VIN (pin 2 and
pin 3) for which the output can respond.
Note 6: Slew rate is measured between
±1V on the output, with a VIN step of
±0.5V, AV = 10 and RL = 1k.
Note 7: Full power bandwidth is calculated from the slew rate measurement:
FPBW = SR/2
πVp.
Note 8: Settling time measurement techniques are shown in “Take the
Guesswork Out of Settling Time Measurements,” EDN, September 19, 1985.
Note 9: NTSC (3.58MHz).
Note 10: AC parameters are 100% tested on the ceramic and plastic DIP
packaged parts (J8 and N8 suffix) and are sample tested on every lot of the SO
packaged parts (S8 suffix).
Note 11: See Application section for shutdown at elevated temperatures. Do
not operate shutdown above TJ > 125°C.
5V
–
+
ELECTRICAL C
C
HARA TERISTICS 0°C ≤ T
A ≤ 70°C, (Note 3)
LT1189C
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VOS
Input Offset Voltage, (Note 4)
Either Input
1.0
3.0
mV
VOS/T
Input VOS Drift
5.0
V/°C
IOS
Input Offset Current
Either Input
0.2
1.5
A
IB
Input Bias Current
Either Input
±0.5
±3.5
A
Input Voltage Range
2.0
3.5
V
CMRR
Common-Mode Rejection Ratio
VCM = 2.0V to 3.5V
80
100
dB
VOUT
Output Voltage Swing
RL = 300 to Ground
VOUT High
3.5
4.0
V
(Note 3)
VOUT Low
0.15
0.4
IS
Supply Current
12
16
mA
Shutdown Supply Current
Pin 5 at V, (Note 11)
0.8
1.5
mA
IS/D
Shutdown Pin Current
Pin 5 at V–
525
A
5V
VS+ = +5V, VS– = 0V, VREF = 2.5V, RFB1 = 900 from pins 6 to 8, RFB2 = 100 from pin 8 to VREF, RL = RFB1 + RFB2 = 1k, CL ≤ 10pF, pin 5
open.
0
°C ≤ TA ≤ 70°C, (Note 3)
ELECTRICAL C
C
HARA TERISTICS
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