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參數(shù)資料
| 型號： | LT1189CS8#TR |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 11/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP VID DIFF CURR FDBK 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 應(yīng)用： | 差分 |
| 電路數(shù)： | 1 |
| -3db帶寬： | 35MHz |
| 轉(zhuǎn)換速率： | 220 V/µs |
| 電流 - 電源： | 13mA |
| 電流 - 輸出 / 通道： | 20mA |
| 電壓 - 電源，單路/雙路(±)： | 4.75 V ~ 16 V，±2.38 V ~ 8 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
LT1189
8
The primary use of the LT1189 is in converting high speed
differential signals to a single-ended output. The LT1189
video difference amplifier has two uncommitted high input
impedance (+) and (–) inputs. The amplifier has another
set of inputs which can be used for reference and feed-
back. Additionally, this set of inputs give gain adjust, and
DC control to the differential amplifier. The voltage gain of
the LT1189 is set like a conventional operational amplifier.
Feedback is applied to pin 8, and it is optimized for gains
of 10 or greater. The amplifier can be operated single-
ended by connecting either the (+) or (–) inputs to the
+/REF (pin 1). The voltage gain is set by the resistors:
(RFB + RG)/RG.
Like the single-ended case, the differential voltage gain is
set by the external resistors: (RFB + RG)/RG. The maximum
input differential signal for which the output will respond
is approximately
±170mV.
Power Supply Bypassing
The LT1189 is quite tolerant of power supply bypassing.
In some applications a 0.1
F ceramic disc capacitor
placed 1/2 inch from the amplifier is all that is required. In
applications requiring good settling time, it is important to
use multiple bypass capacitors. A 0.1
F ceramic disc in
parallel with a 4.7
F tantalum is recommended.
Calculating the Output Offset Voltage
Both input stages contribute to the output offset voltage at
pin 6. The feedback correction forces balance in the input
stages by introducing an Input VOS at pin 8. The complete
expression for the output offset voltage is:
VOUT=(VOS +IOS(RS)+ IB(RREF)) × (RFB + RG)/RG + IB(RFB)
RS represents the input source resistance, typically 75,
and RREF represents finite source impedance from the
DC reference voltage, for VREF grounded, RREF = 0 the
IOS is normally a small contributor and the expression
simplifies to:
VOUT = VOS(RFB + RG)/RG + IB(RFB)
If RFB is limited to 1k, the last term of the equation
contributes only 2mV since IB is less than 2A.
Figure 1. Simplified Input Stage Schematic
U
S
A
O
PPLICATI
WU
U
I FOR ATIO
V +
7
6
LT1189
V –
4
1
8
OUT
V
+
3
–
2
IN
V
S/D
5
AV = +
RFB +
RFB
7
6
LT1189
4
1
8
OUT
V
+
3
–
2
IN DIFF
V
S/D
5
RFB
LT1189 AI01
7
6
LT1189
4
+/REF
1
–/FB
8
OUT
V
+
3
–
2
S/D
5
VO =
RFB +
RFB
7
6
LT1189
4
1
8
OUT
V
+
3
–
2
IN
V
S/D
5
AV = –
RFB +
RFB
IN
V
IN
V
(
( VIN DIFF
RFB
( ( VIN
+/REF
–/FB
+/REF
–/FB
+/REF
–/FB
RG
VO = (V
RFB +
IN DIFF + VIN)
RG
IN DIFF
V
RG
–
RG
V +
V –
V +
V –
V +
V –
LT1189 AI02
+ 1 REF
RREF
RG
8
RFB
6
350
A
Q3
Q4
+
3
RS
345
A
Q1
Q2
–
2
RS
7V+
RE
300
RE
300
4V–
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