參數(shù)資料
型號: LSI53C895A
英文描述: LSI53C895A PCI to Ultra2 SCSI Controller technical manual v2.2 4/01
中文描述: LSI53C895A PCI到Ultra2 SCSI控制器的技術(shù)手冊2.2版4 / 01
文件頁數(shù): 97/166頁
文件大?。?/td> 1330K
代理商: LSI53C895A
Frequently Asked Questions (FAQ)
3-49
3.4.4 Error Reporting
The SAF-TE source code’s individual functions about error reporting
mechanisms have been reviewed in earlier sections. Errors that occur
during a SCSI data transfer result in a check condition or, in some cases
a bus free. Errors that occur during a TWS data transfer manifest
themselves by invalidating the data to be updated in the config data
structure or through the code load status flag
cl_status
and a
corresponding check condition. No other error reporting is provided.
3.5 Frequently Asked Questions (FAQ)
Table 3.18
lists possible questions that might be raised when using this
source code along with appropriate answers.
do_set_fan_speed
Null function.
do_activate_power_supply
Null function.
do_debug_w_sbc
For debugging only - allows control of
the subroutine
execute_program_once.
Table 3.17
Interrupt Service Routines - SCSI Write (Cont.)
SCSI Write Buffer Subroutines
Functional Description
Table 3.18
Source Code Issues
Question
Comment
How is the file
safte.hex
generated Use the makefile with the target specified as SAFTE. See
Section 3.4.1, “Compilation Instructions for safte.c,”
and the
compiler documentation for details.
How is the boot code placed on the
TWS memory device
For a new board, the chip can be placed in a TWS
programmer or (for some boards) downloaded over the
TWS bus. For boards with firmware in place, follow the
instructions in the
Section 3.4.2.3, “Firmware Update,”
page 3-33
.
Where is the boot code stored once it
is downloaded
It is stored in a serial EEPROM.
What is the structure of the entire boot
image
loader.hex + bootload.hex
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