參數(shù)資料
型號: LSI53C860
英文描述: LSI53C860 PCI to Ultra SCSI I/O Processor technical manual v2.1 4/01
中文描述: LSI53C860 PCI到超的SCSI I / O處理器技術(shù)手冊2.1 4 / 01
文件頁數(shù): 156/166頁
文件大?。?/td> 1330K
代理商: LSI53C860
IX-2
Index
development environment (Cont.)
makeboot.bat file
2-12
setting up
2-12
development tools
2-13
device slot operation
questions
5-14
DMA
completing the SCSI work
2-8
do_debug_r_mem
read buffer subroutine
3-48
do_read_xxxx.xxxx
read buffer subroutines
3-48
do_send_global_flags
write buffer subroutine
3-48
DOS commands
5-21
E
EEPROM
3-2
enclosure configuration
config data structure
3-7
enclosure configuration monitoring
1-4
enclosure services processor
1-1
external data memory map
2-3
external interrupt 0/1
interrupt service routines
3-41
F
files
source code
2-14
firmware bootloader
questions
5-19
firmware register names
2-18
to
2-20
firmware update
3-33
firmware_buffer
3-37
flow diagram
command_and_data_phases()
3-44
ir_external1()
3-43
function name
fill_program
3-12
ir_external1()
3-42
ir_external10()
3-41
ir_serial()
3-40
ir_timer0()
3-40
ir_timer1()
3-40
ir_timer2()
3-40
G
gather_LM78_input
high-level subroutine
3-30
gather_TWS_input
describing function
3-24
gather_TWS_input()
high-level subroutine
3-30
general information
config data structure
3-6
generic pointers
2-6
global variables
3-33
I
idata
compiler keyword
2-6
initiator operations
during a cold load
3-35
inquiry command
4-1
inquiry response information
config data structure
3-7
instructions per device
config data structure
3-13
interface peripheral support
two-wire serial
1-2
internal data memory
2-2
internal RAM layout
2-3
internal watchdog timer
3-40
interrupt
compiler keyword
2-6
interrupt destination register
2-12
interrupt levels
low and high
2-8
interrupt mask register
2-12
interrupt service routines
3-40
general
3-46
SCSI commands
3-47
SCSI read
3-48
SCSI write
3-48
interrupt status register
2-12
ir_external1() flow diagram
3-43
ISA bus
using cl_isa command
A-2
ISR flow diagrams
3-41
to
3-45
J
jumpers
A-7
to
A-8
L
LED settings
custom
5-13
write device slot status
5-12
lines of code
all files for source code
2-14
LM78 configuration
for bus #0 and bus #1
3-8
to
3-9
low-level subroutines
3-32
LSI53C040 board
containing a serial port
A-1
containing four serial EEPROMS
A-7
layout/jumper settings
A-6
self-terminating
A-3
supporting data transfers
A-1
LSI53C040 firmware
address decode block
2-3
DMA engine
2-8
features
1-2
to
1-4
reconnection/reselection
2-8
registers
3-39
software state machine
2-7
using SAF-TE
1-1
LSI53C040 interrupts
2-12
M
main module
high-level flow diagram
3-22
main program
3-22
to
3-24
memory area
external data memory map
2-3
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