參數(shù)資料
型號: LR38574
廠商: Sharp Corporation
英文描述: Timing Generator IC for 1 090 k/1 310 k-pixel CCDs
中文描述: 時序發(fā)生器集成電路1 090鉀/ 1 310的k -像素CCD
文件頁數(shù): 6/9頁
文件大?。?/td> 64K
代理商: LR38574
LR38574
6
Serial Data Control
SERIAL DATA INPUT TIMING
The data is shifted at the rising edge of ED
1
, and is
latched at the rising edge of ED
0
.
PWSA is effective at the rising edge of ED
0
, but
others are effective at the horizontal line in which
VH
1AX
to VH
3BX
are active.
ED
0
should be low level during data inputs of ED
1
and ED
2
.
As all internal data are set to low level by ACLX or
PWSA, ED
0
to ED
1
should be input for desirable
operations.
As all internal data except PWSA are set to low
level by PWSA, ED
0
to ED
1
should be input for
desirable operations.
ED
0
ED
1
ED
2
D
29
D
28
D
30
D
31
D
27
D
26
D
25
D
24
D
23
D
22
D
21
D
09
D
10
D
08
D
07
D
06
D
05
D
04
D
03
D
02
D
01
D
00
...
D
11
D
20
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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