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參數(shù)資料
| 型號(hào)： | LR38266 |
| 廠商： | Sharp Corporation |
| 英文描述： | connector |
| 中文描述： | 連接器 |
| 文件頁數(shù)： | 7/20頁 |
| 文件大小： | 92K |
| 代理商： | LR38266 |
7
LR38266
ADDRESS
00h
BIT
CONTENTS
01h
6
5
Standby of DA converter
Output format option
Output format option
TV format option
1 : Standby
Input data is delayed by 1 clock cycle
The clock type to input the data
0 : Not delayed
0 : Non-inverted
1 : Delayed
1 : Inverted
CCD option
0 : NTSC
1 : PAL
1
2
3
4
0
6
5
1
0
2
3
4
Image type option
0 : Normal
1 : Mirror
02h
Muting digital signal outputs
Muting analog signal outputs
0 : OFF
0 : OFF
1 : ON
1 : ON
Color killer function
0 : ON
1 : OFF
Horizontal edge enhancement
0 : ON
1 : OFF
Vertical edge enhancement
0 : ON
1 : OFF
03h
8 bits
Position tuning of CSYNC with the range from +8 clock to –7 clock of CKI
1.
Upper 4 bits : CSYNC, Lower 4 bits : CSYO
Position tuning of CBLK with the ditto range.
0
The option of R/B sequence
0 : Normal
1
The option of U/V sequence
0 : Normal
2
Standby of delay lines
0 : OFF
1 : ON
4
Prohibited to change
0 : Should be kept as is
5
Set YL zero in color processing
0 : OFF
1 : ON
0
Standby of EOO function
0 : Standby
1
Interlace/Non-Interlace
0 : Interlace
2
The polarity of HG
0 : Normal
3
The polarity of SP1, SP2
0 : Normal
4
The polarity of EOO output
0 : Normal
04h
06h
08h
8 bits
7
NAME
STB_DA
OUTPUT2
TESYL
K1
EX_SXB
INTL
HGCO
INVSP
EOOCTRL
MUTE_D
MUTE_A
CKIL
APTHC
APTVC
ADTI2
ADTI1
MIR
TYPE1
TYPE2
TVMD
OUTPUT1
CBLKBALI
CBK_Y
CSYNCVARI
SEL_RB
SEL_UV
RAM_ST
CBK_Y
6
The position tuning of Y-CBLK by CKI
2
clock
bit 7 = 0
No tune
1 clock
bit 5 = 0
No tune
1 clock
bit 3 = 0
No tune
1 clock
bit 7 = 1
–1 clock
–1 clock
bit 5 = 1
–1 clock
–1 clock
bit 3 = 1
–1 clock
–1 clock
bit 6 = 0
bit 6 = 1
07h
bit 4 = 0
bit 4 = 1 Y, U/V (bit 5 = 0) Prohibited (bit 5 = 1)
Y/C (bit 5 = 0) U/Y/V/Y (bit 5 = 1)
bit 1 = 0
bit 1 = 1 270 k/320 k
270 k/320 k with mirror
Prohibited
bit 2 = 0
bit 2 = 1
CCD option
410 k/470 k
BFVARI
1
The position tuning of color burst signal by
CKI
2
clock
bit 1 = 0
No tune
1 clock
bit 1 = 1
–1 clock
–1 clock
bit 0 = 0
bit 0 = 1
0
BFVARI
CBLK_UV
2
CBLK_UV
3
4
CBLK_C
5
CBLK_C
bit 4 = 0
bit 4 = 1
bit 2 = 0
bit 2 = 1
The position tuning of baseband C-CBLK by
CKI
2
clock
The position tuning of modulated C-CBLK by
CKI
2
clock
Not used
INTERNAL COEFFICIENT TABLE
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