參數(shù)資料
型號(hào): LR38266
廠(chǎng)商: Sharp Corporation
英文描述: connector
中文描述: 連接器
文件頁(yè)數(shù): 4/20頁(yè)
文件大小: 92K
代理商: LR38266
4
LR38266
PIN DESCRIPTION
PIN NO.
SYMBOL
POLARITY
I/O
DESCRIPTION
1
ACL
ICU
All reset input. The internal circuit is initialized at power-on with a capacitor of
0.01 μF.
2
3
4
5
6
ADI
0
ADI
1
ADI
2
ADI
3
ADI
4
IC
IC
IC
IC
IC
ADI
0
to ADI
9
are digital signal inputs.
ADI
0
is LSB.
ADI
9
is MSB.
7
8
V
DD
GND
Supply of +3.3 V power.
A grounding pin.
A grounding pin.
Clock input. The frequency is below for each CCD.
270 k, 410 k CCD : 14.31818 MHz
320 k, 470 k CCD : 14.1875 MHz
Clock input. The frequency is below for each CCD.
270 k CCD : 9.5454 MHz
410 k CCD : 14.3181 MHz
A grounding pin.
GND
18
Composite synchronous pulse output for analog video output.
O
CSYNC
17
Optical black clamp pulse output.
O
OCP
1
16
Supply of +3.3 V power.
V
DD
15
A grounding pin.
GND
14
IC
ADI
9
13
IC
ADI
8
12
IC
ADI
7
11
IC
ADI
6
10
ADI
0
to ADI
9
are digital signal inputs.
ADI
0
is LSB.
ADI
9
is MSB.
IC
ADI
5
9
19
CKI
1
IC
320 k CCD : 9.4583 MHz
470 k CCD : 14.1875 MHz
IC
CKI
2
20
22
CKI
0
IC
Clock input. The frequency is below for each CCD.
270 k, 410 k CCD : 28.6363 MHz
320 k, 470 k CCD : 28.3750 MHz
A grounding pin.
Horizontal drive pulse output.
21
GND
23
24
GND
HP
O
27
28
GND
FI
O
A grounding pin.
Field index pulse output.
Vertical reset input. Built-in vertical counter is reset by a low-input of more than
one horizontal period.
ICS
VRI
26
Vertical drive pulse output.
O
VD
25
Composite synchronous pulse output.
Output timing is variable by output mode.
Supply of +3.3 V power.
A grounding pin.
O
CSYO
30
Composite blanking pulse output.
O
CBLK
29
V
DD
GND
31
32
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