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參數(shù)資料
| 型號： | LPC47M14T-NC |
| 廠商： | SMSC Corporation |
| 英文描述： | 128 PIN ENGANCED SUPER I/O CONTROLLER WITH AN LPC INTERFACE AND USB HUB |
| 中文描述： | 128引腳ENGANCED超級I / O與LPC接口和USB集線器控制器 |
| 文件頁數(shù)： | 159/205頁 |
| 文件大?。?/td> | 1219K |
| 代理商： | LPC47M14T-NC |
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SMSC DS – LPC47M14X
Page 159
Rev. 03/19/2001
REGISTER
TEST 3
Default = 0x00, on
VCC POR and
VTR POR
ADDRESS
0x2F R/W
DESCRIPTION
STATE
C
Test Modes: Reserved for SMSC. Users should not
write to this register, may produce undesired results.
Note 1:
Note 2:
Bytes are used. There is no restriction on the address chosen, except that A0 is 0, that is, the address must be on an
even byte boundary. As soon as both bytes are changed, the configuration space is moved to the specified location with
no delay (
Note:
Write byte 0, then byte 1; writing CR27 changes the base address).
The configuration address is only reset to its default address upon a Hard Reset or Vcc POR.
Note:
The default configuration address is either 02E or 04E, as specified by the SYSOPT pin.
Logical Device Configuration/Control Registers [0x30-0xFF]
Used to access the registers that are assigned to each logical unit. This chip supports nine logical units and has nine
sets of logical device registers. The nine logical devices are Floppy, Parallel, Serial 1, Serial 2, Keyboard Controller,
game port, PME, MPU-401, and USB Hub. A separate set (bank) of control and configuration registers exists for each
logical device and is selected with the Logical Device # Register (0x07).
The INDEX PORT is used to select a specific logical device register. These registers are then accessed through the
DATA PORT.
The Logical Device registers are accessible only when the device is in the Configuration State. The logical register
addresses are shown in the table below.
Table 63 – Logical Device Registers
LOGICAL DEVICE
REGISTER
ADDRESS
Activate (Note 1)
Default = 0x00
on VCC POR, VTR POR,
HARD RESET and
SOFT RESET
= 0
CR22 Bit 5 is reset by VTR POR only.
To allow the selection of the configuration address to a user defined location, these Configuration Address
DESCRIPTION
STATE
C
(0x30)
Bits[7:1] Reserved, set to zero.
Bit[0]
= 1
Activates the logical device currently
selected through the Logical Device #
register.
Logical device currently selected is
inactive
(0x31-0x37) Reserved – Writes are ignored, reads return 0.
(0x38-0x3F) Vendor Defined - Reserved - Writes are
ignored, reads return 0.
(0x40-0x5F) Reserved – Writes are ignored, reads return 0.
(0x60-0x6F)
0x60,2,... =
addr[15:8]
0x61,3,... =
addr[7:0]
zero when read.
Logical Device Control
Logical Device Control
C
C
Memory Base Address
I/O Base Address (Note 2)
(see Device Base I/O
Address Table)
Default = 0x00
on VCC POR, VTR POR,
HARD RESET and
SOFT RESET
C
C
Registers 0x60 and 0x61 set the base address
for the device. If more than one base address
is required, the second base address is set by
registers 0x62 and 0x63.
Refer to Table 65 for the number of base
address registers used by each device.
Unused registers will ignore writes and return
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