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參數(shù)資料
| 型號(hào)： | LPC47M14T-NC |
| 廠商： | SMSC Corporation |
| 英文描述： | 128 PIN ENGANCED SUPER I/O CONTROLLER WITH AN LPC INTERFACE AND USB HUB |
| 中文描述： | 128引腳ENGANCED超級(jí)I / O與LPC接口和USB集線器控制器 |
| 文件頁(yè)數(shù)： | 119/205頁(yè) |
| 文件大?。?/td> | 1219K |
| 代理商： | LPC47M14T-NC |
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SMSC DS – LPC47M14X
Page 119
Rev. 03/19/2001
FANx Registers
The FAN1 and FAN2 Registers are located at 0x56 and 0x57 from base I/O in Logical Device A. The bits are defined
below. See the register description in the “Runtime Registers” section.
Fan x Clock Select Bit, D7
The Fan x Clock select bit in the FANx registers is used with the Fan x Clock Source Select and the Fan x Clock
Multiplier bits in the Fan Control register to determine the fan speed F
OUT
. See Table 57 above.
Duty Cycle Control for Fan x, Bits D6 – D1
The Duty Cycle Control (DCC) bits determine the fan duty cycle. The LPC47M14x has
≈
1.56% duty cycle resolution.
When DCC = “000000” (min. value), F
OUT
is always low. When DCC is “111111” (max. value), F
OUT
is almost always
high; i.e., high for 63/64
and low for 1/64
th
of the F
OUT
period.
Generally, the F
OUT
duty cycle (%) is (DCC
÷
64)
×
100.
Fan x Clock Control, Bit D0
The Fan x Clock Control bit D0 is used to override the Duty Cycle Control for Fan x bits and force F
OUT
always high.
When D0 = “0”, the DCC bits determine the F
OUT
duty cycle. When D0 = 1, F
OUT
is always high, regardless of the
state of the DCC bits.
Fan Control Register
The Fan Control Register is located at 0x58 from base I/O in Logical Device A. The bits are defined below. See the
register description in the “Runtime Registers” section.
Fan x Count Divisor, Bits D7-D6 / D5-D4
Fan x Count Divisor bit in Fan Control Register is used to determine fan tachometer count. The choices for the
divisor are 1, 2, 4 and 8. See “Fan Tachometer Input” section.
Fan x Clock Multiplier, Bits D3 / D2
The Fan x Clock Multiplier bit is used with the Fan x Clock Source Select bit in the Fan Control Register and the Fan
x Clock Select bit in Fan register to determine the F
OUT
.
When the Fan x Clock Multiplier bit = “0”, no clock multiplier is used. When the Fan x Clock Multiplier bit = “1”, the
clock speed determined by the Fan x Clock Source Select bit is doubled.
Fan x Clock Source Select, Bits D1 / D0
The Fan x Clock Source Select and the Fan x Clock Multiplier bits in the Fan Control register is used with the Fan x
Clock Select bit in the Fan x registers to determine the fan speed F
OUT
. See Table 57 above.
6.17.2
Fan Tachometer Inputs
The LPC47M14x implements fan tachometer inputs for signals from fans equipped with tachometer outputs. The part
can generate both a PME and an SMI when the fan speed drops below a predetermined value. See description
below.
The clock source for the tachometer count is the 32.768kHz oscillator. The Fan Tachometer Inputs gate a divided
down version of the 32.768kHz oscillator for one period of the Fan signal into an 8-bit counter (maximum count is
255).
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