參數(shù)資料
型號: LPC2478FBD208
廠商: NXP Semiconductors N.V.
元件分類: 數(shù)學(xué)處理器
英文描述: Single-chip 16-bit-32-bit micro; 512 kB flash, Ethernet, CAN, LCD, USB 2.0 device-host-OTG, external memory interface
封裝: LPC2478FBD208<SOT459-1 (LQFP208)|<<http://www.nxp.com/packages/SOT459-1.html<1<Always Pb-free,;LPC2478FET208<SOT950-1 (TFBGA208)|<<http://www.nxp.com/packages/SOT950-1.ht
文件頁數(shù): 39/93頁
文件大?。?/td> 751K
代理商: LPC2478FBD208
LPC2478
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 12 September 2011
39 of 93
NXP Semiconductors
LPC2478
Single-chip 16-bit/32-bit microcontroller
7.14 10-bit ADC
The LPC2478 contains one ADC. It is a single 10-bit successive approximation ADC with
eight channels.
7.14.1
Features
10-bit successive approximation ADC
Input multiplexing among 8 pins
Power-down mode
Measurement range 0 V to V
i(VREF)
10-bit conversion time
2.44
s
Burst conversion mode for single or multiple inputs
Optional conversion on transition of input pin or Timer Match signal
Individual result registers for each ADC channel to reduce interrupt overhead
7.15 10-bit DAC
The DAC allows the LPC2478 to generate a variable analog output. The maximum output
value of the DAC is V
i(VREF)
.
7.15.1
Features
10-bit DAC
Resistor string architecture
Buffered output
Power-down mode
Selectable output drive
7.16 UARTs
The LPC2478 contains four UARTs. In addition to standard transmit and receive data
lines, UART1 also provides a full modem control handshake interface.
The UARTs include a fractional baud rate generator. Standard baud rates such as 115200
can be achieved with any crystal frequency above 2 MHz.
7.16.1
Features
16 B Receive and Transmit FIFOs.
Register locations conform to 16C550 industry standard.
Receiver FIFO trigger points at 1 B, 4 B, 8 B, and 14 B.
Built-in fractional baud rate generator covering wide range of baud rates without a
need for external crystals of particular values.
Fractional divider for baud rate control, auto baud capabilities and FIFO control
mechanism that enables software flow control implementation.
UART1 equipped with standard modem interface signals. This module also provides
full support for hardware flow control (auto-CTS/RTS).
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