參數(shù)資料
型號(hào)： LPC2468FBD208
廠商： NXP Semiconductors N.V.
元件分類： 數(shù)學(xué)處理器
英文描述： Single-chip 16-bit-32-bit micro; 512 kB flash, Ethernet, CAN, ISP-IAP, USB 2.0 device-host-OTG, external memory interface
封裝： LPC2468FBD208<SOT459-1 (LQFP208)|<<http://www.nxp.com/packages/SOT459-1.html<1<Always Pb-free,;LPC2468FET208<SOT950-1 (TFBGA208)|<<http://www.nxp.com/packages/SOT950-1.ht
文件頁(yè)數(shù)： 56/85頁(yè)
文件大?。?/td> 682K
代理商： LPC2468FBD208
LPC2468
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 6.1 — 6 September 2011
56 of 85
NXP Semiconductors
LPC2468
Single-chip 16-bit/32-bit micro
11. Dynamic characteristics
[1]
Parameters are valid over operating temperature range unless otherwise specified.
[2]
Typical ratings are not guaranteed. The values listed are at room temperature (25
C), nominal supply voltages.
[3]
Bus capacitance C
b
in pF, from 10 pF to 400 pF.
Table 10.
T
amb
=
40
C to +85
C for commercial applications; V
DD(3V3)
over specified ranges.
[1]
Symbol
Parameter
External clock
f
osc
oscillator frequency
T
cy(clk)
clock cycle time
t
CHCX
clock HIGH time
t
CLCX
clock LOW time
t
CLCH
clock rise time
t
CHCL
clock fall time
I
2
C-bus pins (P0[27]/SDA0 and P0[28]/SCL0)
t
f(o)
output fall time
SSP interface
t
su(SPI_MISO)
SPI_MISO set-up time
Dynamic characteristics
Conditions
Min
Typ
[2]
Max
Unit
1
42
T
cy(clk)
0.4
T
cy(clk)
0.4
-
-
-
-
-
-
-
-
25
1000
-
-
5
5
MHz
ns
ns
ns
ns
ns
V
IH
to V
IL
20 + 0.1
C
b
[3]
-
-
ns
T
amb
= 25
C;
measured in
SPI Master
mode; see
Figure 17
-
11
-
ns
Fig 13. External clock timing (with an amplitude of at least V
i(RMS)
= 200 mV)
t
CHCL
t
CLCX
t
CHCX
t
CLCH
T
cy(clk)
002aaa907
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