- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄369813 > LPC2124 (NXP Semiconductors N.V.) Single Chip 32-bit Microcontroller Erratasheet PDF資料下載
參數(shù)資料
| 型號(hào)： | LPC2124 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Single Chip 32-bit Microcontroller Erratasheet |
| 中文描述： | 單片32位微控制器Erratasheet |
| 文件頁(yè)數(shù)： | 6/9頁(yè) |
| 文件大?。?/td> | 134K |
| 代理商： | LPC2124 |
2004 November 8
6
LPC2124
Philips Semiconductors
Single Chip 32-bit Microcontroller
Erratasheet
CAP.1
Problem when selecting P0.21 as a capture 1.3 input (timer1)
Introduction:
P0.21 and P0.19 may be configured as capture inputs via the PINSEL register.
Problem:
When PINSEL(11:10) is set to "11" P0.21 is not internally connected as capture 1.3
Work-around: To use P0.21 as capture 1.3, PINSEL(7:6) must also be set to "11" which means that P0.19 must
be selected as capture input 1.2.
VPBDIV.1
Incorrect read of VPBDIV
Introduction:
The Peripheral Bus Divider (VPBDIV) divides the processor clock (CCLK) by one, two, or four. This
is the clock that is provided to the peripheral bus.
Problem:
Reading the VPBDIV register may return an incorrect value.
work-around:
Performing two consecutive reads of the VPBDIV assures that the correct value is returned.
Timer.1
Missed Interrupt Potential
Introduction:
The Timers may be configured so that events such as Match, Capture, and PWM, cause interrupts.
Bits in the Interrupt Register (IR) indicate the source of the interrupt, whether from Capture or
Match.
Problem:
If more than one interrupt for multiple Match events using the same Timer are enabled, it is possible
that one of the match interrupts may not be recognized. If this occurs no more interrupts from that
specific match register will be recognized. This could happen in a scenario where the match events
are very close to each other. This issue also affects the Capture functionality.
Specific details:
Suppose that two match events are very close to each other (Say Match0 and Match1). Also
assume that the Match0 event occurs first. When the Match0 interrupt occurs the 0th bit of the
Interrupt Register will be set. To exit the Interrupt Service Routine of Match0, this bit has to be
cleared in the Interrupt Register. The clearing of this bit might be done by using the following
statement:
T0_IR = 0x1;
It is possible that software will be writing a 1 to bit 0 of the Interrupt Register while a Match1 event
occurs, meaning that hardware needs to set the bit 1 of the Interrupt Register. In this case, since
hardware is accessing the register at the same time as software, bit 1 for Match1 never gets set,
causing the interrupt to be missed.
In summary, while software is writing to the Interrupt Register, any Match or Capture event (which
are configured to interrupt the core) occurring at the same time may result in the subsequent
interrupt not being recognized.
Similarly for the Capture event, if a capture event occurs while a Match event is being is serviced
then the Capture event might be missed if the software and hardware accesses coincide.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LPC2131 | Single-chip 16/32-bit microcontrollers; 32/64/512 kB ISP/IAP Flash with 10-bit ADC and DAC |
| LPC2132 | Single-chip 16/32-bit microcontrollers; 32/64/512 kB ISP/IAP Flash with 10-bit ADC and DAC |
| LPC2142 | Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, USB 2.0 full-speed device, 10-bit ADC and DAC |
| LPC2141 | Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, USB 2.0 full-speed device, 10-bit ADC and DAC |
| LPC2144 | Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, USB 2.0 full-speed device, 10-bit ADC and DAC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LPC2124FBD01 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Single-chip 16/32-bit microcontrollers; 128/256 kB ISP/IAP flash with 10-bit ADC |
| LPC2124FBD64 | 制造商:NXP Semiconductors 功能描述:MCU 32BIT ARM7 256K FLASH LQFP64 |
| LPC2124FBD64,151 | 功能描述:ARM微控制器 - MCU PREF PART LPC2124FBD64/01-S RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC2124FBD64/00 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Single-chip 16/32-bit microcontrollers; 128/256 kB ISP/IAP flash with 10-bit ADC |
| LPC2124FBD64/01 | 制造商:NXP Semiconductors 功能描述:MCU, 16BIT/32BIT, 60MHZ, LQFP-64 制造商:NXP Semiconductors 功能描述:MCU, 16BIT/32BIT, 60MHZ, LQFP-64, Controller Family/Series:LPC2100, Core Size:16 制造商:NXP Semiconductors 功能描述:MCU, 16BIT/32BIT, 60MHZ, LQFP-64, Controller Family/Series:LPC2100, Core Size:16bit / 32bit, No. of I/O's:46, Supply Voltage Min:1.65V, Supply Voltage Max:1.95V, Digital IC Case Style:LQFP, No. of Pins:64, Program Memory Size:256KB, |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。