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參數(shù)資料
| 型號(hào)： | LP87C54-20 |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER WITH 16 KBYTES USER PROGRAMMABLE EPROM |
| 中文描述： | 8-BIT, OTPROM, 20 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | PLASTIC, DIP-40 |
| 文件頁數(shù)： | 18/20頁 |
| 文件大?。?/td> | 290K |
| 代理商： | LP87C54-20 |
AUTOMOTIVE 87C54/87C54-20
EPROM Program Lock
The
grammed, protect the onboard program against soft-
ware piracy.
87C54
program
lock
system,
when
pro-
The 87C54 has a 3-level program lock system and a
64-byte encryption array. Since this is an EPROM
device, all locations are user programmable. See
Table 4.
Program Lock Bits
The 87C54 has 3 programmable lock bits that when
programmed according to Table 4 will provide differ-
ent levels of protection for the on-chip code and
data. See Table 3.
Erasing the EPROM also erases the encryption ar-
ray and the program lock bits, returning the part to
full functionality.
Encryption Array
Within the EPROM array are 64 bytes of Encryption
Array that are initially unprogrammed (all 1’s). Every
time that a byte is addressed during a verify, 6 ad-
dress lines are used to select a byte of the Encryp-
tion Array. This byte is then exclusive-NOR’ed
(XNOR) with the code byte, creating an Encryption
Verify byte. The algorithm, with the array in the un-
programmed state (all 1’s), will return the code in it’s
original, unmodified form. For programming the En-
cryption Array, refer to Table 3 (EPROM Program-
ming Modes).
Reading the Signature Bytes
The 87C54 has 3 signature bytes in locations 30H,
31H and 60H. To read these bytes follow the proce-
dure for EPROM verify, but activate the control lines
provided in Table 3 for Read Signature Byte.
Location
Contents
87C54
30H
89H
31H
58H
60H
54H
Table 4. Program Lock Bits and the Features
Program Lock Bits
Protection Type
LB1
LB2
LB3
1
U
U
U
No Program Lock features enabled. (Code verify will still be encrypted by the
Encryption Array if programmed.)
2
P
U
U
MOVC instructions executed from external program memory are disabled
from fetching code bytes from internal memory, EA is sampled and latched on
Reset, and further programming of the EPROM is disabled.
3
P
P
U
Same as 2, also verify is disabled.
4
P
P
P
Same as 3, also external execution is disabled.
Any other combination of the lock bits is not defined.
18
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