- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377656 > LP702 (Polyfet RF Devices) SILICON GATE ENHANCEMENT MODE RF POWER LDMOS TRANSISTOR PDF資料下載
參數(shù)資料
| 型號： | LP702 |
| 廠商： | Polyfet RF Devices |
| 英文描述： | SILICON GATE ENHANCEMENT MODE RF POWER LDMOS TRANSISTOR |
| 中文描述： | 硅柵增強(qiáng)型射頻功率LDMOS晶體管 |
| 文件頁數(shù)： | 1/2頁 |
| 文件大小： | 35K |
| 代理商： | LP702 |
polyfet rf devices
LP702
12
Single Ended
AP
60.0
3.2
120.0
1.00 C/W
65
3.2
20.00
4.0
55
0.45
12.00
9.0
150
0.40
70
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
TEST CONDITIONS
Common Source Power Gain
Drain Efficiency
Total
Device
Dissipation
Junction to
Case Thermal
Resistance
Maximum
Junction
Temperature
Storage
Temperature
DC Drain
Current
Drain to
Source
Voltage
Gate to
Source
Voltage
-65 C to 150 C
200 C
A
V
Load Mismatch Tolerance
VSWR
Drain to
Gate
Voltage
20:1
Relative
0.60
0.40
Ids =
mA, Vgs = 0V
V, Vgs = 0V
Ciss
Crss
Coss
Vds =
Idq =
A, Vds = V, F =
0.60
Bvdss
Idss
Drain Breakdown Voltage
V
mA
pF
pF
pF
Common Source Output Capacitance
Common Source Feedback Capacitance
Idq =
Idq = 0.60
500
Vgs = 20V, Ids =
Rdson
Saturation Resistance
Forward Transconductance
gM
Vds = 10V, Vgs = 5V
POLYFET RF DEVICES
1110 Avenida Acaso, Camarillo, Ca 93012 Tel:(805) 484-4210 FAX: (805) 484-3393 EMAIL:Sales@polyfet.com URL:www.polyfet.com
500
500
Common Source Input Capacitance
70
V
20
Igss
Vgs
Idsat
Zero Bias Drain Current
Gate Leakage Current
Gate Bias for Drain Current
Saturation Current
1
7
uA
V
Mho
Ohm
Amp
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
TEST CONDITIONS
ELECTRICAL CHARACTERISTICS ( EACH SIDE )
RF CHARACTERISTICS (
70.0
ABSOLUTE MAXIMUM RATINGS ( T =
Gps
A, Vds = V, F =
A, Vds = V, F =
Watts
V
1
MHz
MHz
MHz
Watts
Package Style
70.0
Vds = 0V Vgs = 30V
Vgs = 20V, Vds = 10V
HIGH EFFICIENCY, LINEAR
HIGH GAIN, LOW NOISE
General Description
Silicon VDMOS and LDMOS
transistors designed specifically
for broadband RF applications.
Suitable for Militry Radios,
Cellular and Paging Amplifier Base
Stations, Broadcast FM/AM, MRI,
Laser Driver and others.
28.0
Vds =
A, Vgs = Vds
Ids =
A
η
dB
%
o
o
o
"Polyfet" process features
low feedback and output capacitances
resulting in high F transistors with high
input impedance and high efficiency.
SILICON GATE ENHANCEMENT MODE
RF POWER
TRANSISTOR
LDMOS
Vgs = 0V, F = 1 MHz
28.0
Vds =
Vgs = 0V, F = 1 MHz
28.0
Vds =
Vgs = 0V, F = 1 MHz
28.0
REVISION 04/27/2001
25 C )
WATTS OUTPUT )
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LP721 | 537401364 |
| LP722 | SILICON GATE ENHANCEMENT MODE RF POWER LDMOS TRANSISTOR |
| LP801 | SILICON GATE ENHANCEMENT MODE RF POWER LDMOS TRANSISTOR |
| LP802 | SILICON GATE ENHANCEMENT MODE RF POWER LDMOS TRANSISTOR |
| LP80C52 | CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LP-70FMB | 制造商:Polycase 功能描述:Enclosure; Flanged; Flame Retardant ABS Plastic; 5.50 x 4.25 x 1.75 in; Black |
| LP-70FMB-BONE | 制造商:Polycase 功能描述:Enclosure;Flanged;PanelMount;ABS,UL94V-0;Bone;5.5x4.25x1.75 In;LP Series |
| LP-70MB | 制造商:Polycase 功能描述:Enclosure;ABS;Black;LP Series |
| LP7-11121G22 | 制造商:OTTO Engineering Inc 功能描述:FLUSH,SHORT BEZEL, |
| LP721 | 制造商:POLYFET 制造商全稱:Polyfet RF Devices 功能描述:SILICON GATE ENHANCEMENT MODE RF POWER LDMOS TRANSISTOR |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。