參數(shù)資料
型號(hào): LNBH221
廠商: 意法半導(dǎo)體
英文描述: DUAL LNB SUPPLY AND CONTROL IC WITH STEP-UP CONVERTER AND I2C INTERFACE
中文描述: 雙LNB電源與控制集成電路升壓轉(zhuǎn)換器和I2C接口
文件頁(yè)數(shù): 5/18頁(yè)
文件大?。?/td> 515K
代理商: LNBH221
LNBH221
5/18
APPLICATION INFORMATION
Basically, the LNBH221 includes two circuits that are completely independent. Each circuit can be
separately controlled and must have its independent external components. All the below specification
must be considered equal for each section.
This IC has a built in DC/DC step-up controller that, from a single supply source ranging from 8 to 15V,
generates the voltages (V
UP
) that let the linear post-regulator to work at a minimum dissipated power of
1W typ. @ 500mA load (the linear regulator drop voltage is internally kept at: V
UP
-V
OUT
=2V typ.). An
UnderVoltage Lockout circuit will disable the whole circuit when the supplied V
CC
drops below a fixed
threshold (6.7V typically). The internal 22KHz tone generator is factory trimmed in accordance to the
standards, and can be controlled either by the I
2
C
TM
interface or by a dedicated pin (DSQIN) that allows
immediate DiSEqC
TM
data encoding (*). When the TEN (Tone ENable) I
2
C bit it is set to HIGH, a
continuous 22KHz tone is generated on the output regardless of the DSQIN pin logic status.
The TEN bit must be set LOW when the DSQIN pin is used for DiSEqC
TM
encoding. The fully
bi-directional DiSEqC
TM
2.0 interfacing is completed by the built-in 22KHz tone detector. Its input pin
(DETIN) must be AC coupled to the DiSEqC
TM
bus, and the extracted PWK data are available on the
DSQOUT pin (*). To comply to the bi-directional DiSEqC
TM
2.0 bus hardware requirements an output R-L
filter is needed. The LNBH221 is provided with two output pins: the V
O
TX to be used during the tone
transmission and the V
O
RX to be used when the tone is received. This allows the 22KHz Tone to pass
without any losses due to the R-L filter impedance (see DiSeqC 2.0 application circuit on page 5). In
DiSeqC 2.0 applications during the 22KHz transmission activated by DSQIN pin (or TEN I
2
C bit), the
V
O
TX pin must be preventively set ON by the TTX I
2
C bit and, both the 13/18V power supply and the
22KHz tone, are provided by mean of V
O
TX output. As soon as the tone transmission is expired, the
V
O
TX must be set to OFF by setting the TTX I
2
C bit to zero and the 13/18V power supply is provided to
the LNB by the V
O
RX pin through the R-L filter. When the LNBH221 is used in DiSeqC 1.x applications the
R-L filter is not required (see DiSeqC 1.x application circuit on pag.5), the TTX I
2
C bit must be kept always
to HIGH so that, the V
O
TX output pin can provide both the 13/18V power supply and the 22KHz tone,
enabled by DSQIN pin or by TEN I
2
C bit. All the functions of this IC are controlled via I
2
C
TM
bus by writing
6 bits on the System Register (SR, 8 bits). The same register can be read back, and two bits will report the
diagnostic status. When the IC is put in Stand-by (EN bit LOW), the power blocks are disabled.
When the regulator blocks are active (EN bit HIGH), the output can be logic controlled to be 13 or 18 V by
mean of the VSEL bit (Voltage SELect) for remote controlling of non-DiSEqC LNBs. Additionally, the
LNBH221 is provided with the LLC I
2
C bit that increase the selected voltage value (+1V when VSEL=0
and +1.5V when VSEL=1) to compensate for the excess voltage drop along the coaxial cable (LLC bit
HIGH). By mean of the LLC bit, the LNBH221 is also compliant to the American LNB power supply
standards that require the higher output voltage level to 19.5V (typ.) (instead of 18V), by simply setting the
LLC=1 when VSEL=1. In order to improve design flexibility and to allow implementation of newcoming
LNB remote control standards, an analogic modulation input pin is available (EXTM).
An appropriate DC blocking capacitor must be used to couple the modulating signal source to the EXTM
pin. Also in this case, the V
O
TX output must be set ON during the tone transmission by setting the TTX bit
high. When external modulation is not used, the relevant pin can be left open. The current limitation block
is SOA type: if the output port is shorted to ground, the SOA current limitation block limits the short circuit
current (I
SC
) at typically 300mA or 200mA respectively for V
OUT
13V or 18V, to reduce the power
dissipation. Moreover, it is possible to set the Short Circuit Current protection either statically (simple
current clamp) or dynamically by the PCL bit of the I
2
C SR; when the PCL (Pulsed Current Limiting) bit is
set to LOW, the overcurrent protection circuit works dynamically, as soon as an overload is detected, the
output is shut-down for a time T
OFF
, typically 900ms. Simultaneously the OLF bit of the System Register
is set to HIGH. After this time has elapsed, the output is resumed for a time T
ON
=1/10T
OFF
(typ.). At the
end of T
ON
, if the overload is still detected, the protection circuit will cycle again through T
OFF
and T
ON
. At
the end of a full T
ON
in which no overload is detected, normal operation is resumed and the OLF bit is
reset to LOW. Typical T
ON
+T
OFF
time is 990ms and it is determined by an internal timer. This dynamic
operation can greatly reduce the power dissipation in short circuit condition, still ensuring excellent
power-on start up in most conditions. However, there could be some cases in which an highly capacitive
load on the output may cause a difficult start-up when the dynamic protection is chosen. This can be
solved by initiating any power start-up in static mode (PCL=HIGH) and then switching to the dynamic
mode (PCL=LOW) after a chosen amount of time. When in static mode, the OLF bit goes HIGH when the
current clamp limit is reached and returns LOW when the overload condition is cleared. This IC is also
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