參數(shù)資料
型號: LMX2336LSLB
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: PLLatinum⑩ Low Power Dual Frequency Synthesizer for RF Personal Communications
中文描述: PLL FREQUENCY SYNTHESIZER, 2000 MHz, PQCC24
封裝: PLASTIC, CSP-24
文件頁數(shù): 15/22頁
文件大?。?/td> 542K
代理商: LMX2336LSLB
Typical Application Example
DS012807-11
Operational Notes:
*
VCO is assumed AC coupled.
**
R
increases impedance so that VCO output power is provided to the load rather than the PLL. Typical values are 10
to 200
depending on the VCO power level. f
IN
RF impedance ranges from 40
to 100
. f
IN
IF impedances are higher.
***
50
termination is often used on test boards to allow use of external reference oscillator. For most typical products a
CMOS clock is used and no terminating resistor is required. OSC
may be AC or DC coupled. AC coupling is recom-
mended because the input circuit provides its own bias. (See Figure below).
****
R2 configured F
o
LD for use in FastLock mode.
*****
Adding RC filters to the V
CC
lines is recommended to reduce loop-to-loop noise coupling.
DS012807-12
Application Hints:
Proper use of grounds and bypass capacitors is essential to achieve a high level of performance. Crosstalk between pins can be reduced by careful board
layout.
This is an electrostatic sensitive device. It should be handled only at static free work stations.
www.national.com
15
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