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參數(shù)資料
| 型號： | LMX1600TM |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | PLLatinum⑩ Low Cost Dual Frequency Synthesizer |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 2000 MHz, PDSO16 |
| 封裝： | PLASTIC, TSSOP-16 |
| 文件頁數(shù)： | 9/14頁 |
| 文件大?。?/td> | 196K |
| 代理商： | LMX1600TM |
2.0
Programming Description
(Continued)
1.1 GHz option (12 bit)
MAIN_B_CNTR
8
7
0
0
0
0
1
1
Divide Ratio
3
4
4,095
11
0
0
1
10
0
0
1
9
0
0
1
6
0
0
1
5
0
0
1
4
0
0
1
3
0
0
1
2
0
1
1
1
1
0
1
0
1
0
1
Note 14:
Divide ratio: 3 to 4,095 (Divide ratios less than 3 are prohibited)
MAIN_B_CNTR
≥
MAIN_A_CNTR.
See section 2.3.7 for calculation of VCO output frequency.
2.3.7
The N divider counts such that it divides the VCO RF frequency by (P+1) for A times, and then divides by P for (B – A ) times.
The B value (B_CNTR) must be
≥
3. The continuous divider range for the Main PLL N divider is from 992 to 65,535 for 2 GHz
option, from 240 to 65,535 for 1.1 GHz option, and from 56 to 32,767 for 500 MHz option. Divider ratios less than the minimum
value are achievable as long as the binary counter value is greater than or equal to the swallow counter value (B_CNTR
≥
A_CNTR).
f
VCO
= N x ( f
OSC
/ R )
N = (P x B) + A
f
VCO
:
Output frequency of external voltage controlled oscillator (VCO)
f
OSC
:
Output frequency of the external reference frequency oscillator (input to OSC
IN
).
R:
Preset divide ratio of binary programmable reference counter (R_CNTR)
N:
Preset divide ratio of main programmable integer N counter (N_CNTR)
B:
Preset divide ratio of binary programmable B counter (B_CNTR)
A:
Preset value of binary 4-bit swallow A counter (A _CNTR)
P:
Preset modulus of dual modulus prescaler (P = 32 for 2 GHz option, P=16 for 1.1 GHz option, and P=8 for 500 MHz
option)
Pulse Swallow Function
2.4
CHARGE PUMP CONTROL WORD (CP_WORD)
MSB
AUX_CP_GAIN
LSB
MAIN_CP_GAIN
AUX_PD_POL
MAIN_PD_POL
BIT
LOCATION
MAIN_R[17]
MAIN_R[16]
MAIN_R[15]
MAIN_R[14]
FUNCTION
0
1
AUX_CP_GAIN
MAIN_CP_GAIN
AUX_PD_POL
MAIN_PD_POL
AUX_CP_GAIN
(MAIN_R[17]) and
MAIN_CP_GAIN
(MAIN_R[16]) are used to select charge pump current magnitude either low
gain mode (160 μA typ) or high gain mode (1600 μA typ)
AUX_ PD_POL
(MAIN_R[15]) and
MAIN_ PD_POL
(MAIN_R[14]) are respectively set to one when Aux or Main VCO character-
istics are positive as in (1) below. When VCO frequency decreases with increasing control voltage (2)
PD_POL
should set to zero.
Aux Charge Pump Current Gain
Main Charge Pump Current Gain
Aux Phase Detector Polarity
Main Phase Detector Polarity
LOW
LOW
Negative
Negative
HIGH
HIGH
Positive
Positive
9
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LMX1600TM/NOPB | 功能描述:IC FREQ SYNTHESIZER DUAL 16TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:PLLatinum™ 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| LMX1600TMX | 功能描述:IC FREQ SYNTHESZR 2.0GHZ 16TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:PLLatinum™ 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| LMX1600TMX/NOPB | 制造商:Texas Instruments 功能描述:PLL Frequency Synthesizer Dual 16-Pin TSSOP T/R |
| LMX1601 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinum⑩ Low Cost Dual Frequency Synthesizer |
| LMX1601SLB | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinum⑩ Low Cost Dual Frequency Synthesizer |
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