參數(shù)資料
型號(hào): LMX1600TM
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: PLLatinum⑩ Low Cost Dual Frequency Synthesizer
中文描述: PLL FREQUENCY SYNTHESIZER, 2000 MHz, PDSO16
封裝: PLASTIC, TSSOP-16
文件頁數(shù): 2/14頁
文件大小: 196K
代理商: LMX1600TM
Connection Diagram
Pin Description
Pin
No.
1
Pin Name
I/O
Description
FoLD
O
Multiplexed output of the Main/Aux programmable or reference dividers and Main/Aux lock
detect. CMOS output. (See Programming Description 2.5)
PLL reference input which drives both the Main and Aux R counter inputs. Has about 1.2V
input threshold and can be driven from an external CMOS or TTL logic gate. Typically
connected to a TCXO output. Can be used with an external resonator (See Programming
Description 2.5.4).
Oscillator output. Used with an external resonator.
Aux PLL ground.
Aux prescaler input. Small signal input from the VCO.
Aux PLL power supply voltage input. Must be equal to V
CC
. May range from 2.7V to
3.6V. Bypass capacitors should be placed as close as possible to this pin and be
connected directly to the ground plane.
Aux PLL Charge Pump output. Connected to a loop filter for driving the control input of an
external VCO.
Powers down the Aux PLL when LOW (N and R counters, prescaler, and tristates charge
pump output). Bringing EN
AUX
HIGH powers up the Aux PLL.
Powers down the Main PLL when LOW (N and R counters, prescaler, and tristates charge
pump output). Bringing EN
MAIN
HIGH powers up the Main PLL.
Main PLL Charge Pump output. Connected to a loop filter for driving the control input of an
external VCO.
Main PLL power supply voltage input. Must be equal to V
CC
. May range from 2.7V to
3.6V. Bypass capacitors should be placed as close as possible to this pin and be
connected directly to the ground plane.
Main prescaler input. Small signal input from the VCO.
Main PLL ground.
Load enable high impedance CMOS input. Data stored in the shift registers is loaded into
one of the 4 internal latches when LE goes HIGH (control bit dependent).
High impedance CMOS input. Binary serial data input. Data entered MSB first. The last two
bits are the control bits.
High impedance CMOS Clock input. Data for the various counters is clocked in on the
rising edge, into the 18-bit shift register.
2
OSC
IN
I
3
4
5
6
OSC
OUT
GND
fin
AUX
V
CC
AUX
O
I
7
CPo
AUX
O
8
EN
AUX
I
9
EN
MAIN
I
10
CPo
MAIN
O
11
V
CC
MAIN
12
13
14
fin
MAIN
GND
LE
I
I
15
Data
I
16
Clock
I
DS100129-2
Order Number LMX1600TM, LMX1601TM, or LMX1602TM
NS Package Number MTC16
www.national.com
2
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