參數(shù)資料
型號： LMK04000BEVAL/NOPB
廠商： National Semiconductor
文件頁數(shù)： 56/65頁
文件大?。?/td> 0K
描述： BOARD EVAL PRECISION CLOCK PLL
標(biāo)準(zhǔn)包裝： 1
系列： PowerWise®
主要目的： 計(jì)時(shí)，時(shí)鐘調(diào)節(jié)器
嵌入式： 否
已用 IC / 零件： LMK04000
主要屬性： 122.88 MHz VCXO
次要屬性： 集成式 PLL 和 VCO
已供物品： 板，線纜
其它名稱： LMK04000BEVAL
LMK04000BEVAL-ND
SNOSAZ8J – SEPTEMBER 2008 – REVISED SEPTEMBER 2011
Absolute Maximum Ratings
(1) (2) (3) (4)
Parameter
Symbol
Ratings
Units
Supply Voltage (5)
VCC
-0.3 to 3.6
V
Input Voltage
VIN
-0.3 to (VCC + 0.3)
V
Storage Temperature Range
TSTG
-65 to 150
°C
Lead Temperature (solder 4 sec)
TL
+260
°C
Differential Input Current (CLKinX/X*,
IIN
± 5
mA
OSCin/OSCin*)
(1)
"Absolute Maximum Ratings" indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test
conditions, see the Electrical Characteristics. The guaranteed specifications apply only to the test conditions listed.
(2)
If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
(3)
This device is a high performance RF integrated circuit with an ESD rating up to 8 KV Human Body Model, up to 300 V Machine Model
and up to 1,250 V Charged Device Model and is ESD sensitive. Handling and assembly of this device should only be done at ESD-free
workstations.
(4)
Stresses in excess of the absolute maximum ratings can cause permanent or latent damage to the device. These are absolute stress
ratings only. Functional operation of the device is only implied at these or any other conditions in excess of those given in the operation
sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability.
(5)
Never to exceed 3.6 V.
Package Thermal Resistance
Package
θJA
θJ-PAD (Thermal Pad)
48-Lead WQFN (1)
27.4° C/W
5.8° C/W
(1)
Specification assumes 16 thermal vias connect the die attach pad to the embedded copper plane on the 4-layer JEDEC board. These
vias play a key role in improving the thermal performance of the WQFN. It is recommended that the maximum number of vias be used in
the board layout.
Recommended Operating Conditions
Parameter
Symbol
Condition
Min
Typical
Max
Unit
Ambient
TA
VCC = 3.3 V
-40
25
85
°C
Temperature
Supply Voltage
VCC
3.15
3.3
3.45
V
Electrical Characteristics
(3.15 V
≤ VCC ≤ 3.45 V, -40 °C ≤ TA ≤ 85 °C. Typical values represent most likely parametric norms at VCC = 3.3 V, TA = 25
°C, at the Recommended Operating Conditions at the time of product characterization and are not guaranteed.)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Current Consumption
ICC_PD
Power Down Supply Current
1
mA
LMK04000, LMK04001,
LMK04002
380
435
(2)
Supply Current with all clocks
ICC_CLKS
enabled, all delay bypassed,
LMK04010, LMK04011
mA
378
435
Fout disabled. (1)
(2)
LMK04031, LMK04033
335
385
(2)
CLKin0/0* and CLKin1/1* Input Clock Specifications
Manual Select mode
0.001
400
Clock Input Frequency
fCLKin
MHz
(3)
Auto-Switching mode
1
400
(1)
Load conditions for output clocks: LVPECL: 50
Ω to VCC-2 V. 2VPECL: 50 Ω to VCC-2.36 V. LVDS: 100 Ω differential. LVCMOS: 10 pF.
(2)
Additional test conditions for ICC limits: All clock delays disabled, CLKoutX_DIV = 510, PLL1 and PLL2 locked. (See Table 33 for more
information)
(3)
CLKin0 and CLKin1 maximum of 400 MHz is guaranteed by characterization, production tested at 200 MHz.
6
Copyright 2008–2011, Texas Instruments Incorporated
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