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參數(shù)資料
| 型號(hào)： | LMF40 |
| 文件頁(yè)數(shù)： | 4/16頁(yè) |
| 文件大?。?/td> | 321K |
| 代理商： | LMF40 |
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Filter Electrical Characteristics
(Continued)
The following specifications apply for f
CLK
e
250 kHz.
Boldface limits apply for T
A
e
T
J
e
T
MIN
to T
MAX
:
All other limits T
A
e
T
J
e
25
§
C.
Symbol
Parameter
Conditions
Typical
(Note 10)
Limits
(Note 11)
Units
(Limit)
V
a
e a
2.5V, V
b
e b
2.5V
(Continued)
D
f
CLK
/f
c
/
D
T
Clock to Cutoff
Frequency Ratio
Temperature Coefficient
LMF40-50
LMF40-100
5
5
ppm/
§
C
ppm/
§
C
A
MIN
Stopband Attenuation
At 2 f
c
b
24.0
dB (min)
V
OS
Unadjusted DC
Offset Voltage
LMF40-50
LMF40-100
g
80 /
g
100
g
80 /
g
100
mV (max)
mV (max)
V
O
Output Swing
R
L
e
5 k
X
a
1.4 /
a
1.2
b
2.0 /
b
1.8
V (min)
V (max)
I
SC
Output Short Circuit
Current (Note 8)
Source
Sink
42
0.9
mA
mA
Dynamic Range
(Note 4)
81
dB
Additional Magnitude Response
Test Points (Note 6)
LMF40-50
f
IN
e
6 kHz
f
IN
e
4.5 kHz
b
7.50
g
0.26 /
b
7.50
g
0.30
b
1.46
g
0.12 /
b
1.46
g
0.16
dB (max)
dB (max)
LMF40-100
f
IN
e
3 kHz
f
IN
e
2.25 kHz
b
7.15
g
0.26 /
b
7.15
g
0.30
b
1.42
g
0.12 /
b
1.42
g
0.16
dB (max)
dB (max)
Clock Feedthrough
Filter Output
V
IN
e
0V
5
mV
P–P
Logic Input-Output Characteristics
The following specifications apply for V
b
e
0V unless otherwise
specified.
Boldface limits apply for T
A
e
T
J
e
T
MIN
to T
MAX
:
all other limits T
A
e
T
J
e
25
§
C.
Symbol
Parameter
Conditions
Typical
(Note 10)
Limits
(Note 11)
Units
(Limit)
TTL CLOCK INPUT, CLK R PIN
(Note 9)
TTL CLK R Pin Input Voltage
V
a
e a
5V
V
b
e b
5V
Logic ‘‘1’’
Logic ‘‘0’’
2.0 /
2.1
0.8 /
0.8
V (min)
V (max)
CLK R Input Voltage
V
a
e a
2.5V
V
b
e b
2.5V
Logic ‘‘1’’
Logic ‘‘0’’
2.0 /
2.0
0.6 /
0.4
V (min)
V (max)
Maximum Leakage Current
at CLK R Pin
2.0
m
A
SCHMITT TRIGGER
V
T
a
Positive Going Input
Threshold Voltage
CLK IN Pin
V
a
e a
10V
6.1 /
6.0
8.8 /
8.9
V (min)
V (max)
V
a
e a
5V
3.0 /
2.9
4.3 /
4.4
V (min)
V (max)
4
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