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參數(shù)資料
| 型號： | LMC7211AIN |
| 英文描述： | IC-CMOS COMPARATOR |
| 中文描述： | 集成電路的CMOS比較器 |
| 文件頁數(shù)： | 4/14頁 |
| 文件大?。?/td> | 277K |
| 代理商： | LMC7211AIN |
AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
J
e
25
§
C, V
a
e
5V, V
b
e
0V, V
CM
e
V
O
e
V
a
/2.
Boldface
limits
apply at the temperature extreme.
Typ
LMC7211AI
Limit
(Note 6)
LMC7211BI
Limit
(Note 6)
Symbol
Parameter
Conditions
(Note 5)
Units
t
rise
Rise Time
f
e
10 kHz, Cl
e
50 pF,
Overdrive
e
10 mV (Note 9)
0.3
m
s
t
fall
Fall Time
f
e
10 kHz, Cl
e
50 pF,
Overdrive
e
10 mV (Note 9)
0.3
m
s
t
PHL
Propagation Delay
(High to Low)
(Note 11)
f
e
10 kHz,
Cl
e
50 pF
(Note 9)
10 mV
10
m
s
100 mV
4
V
a e
2.7V,
f
e
10 kHz,
Cl
e
50 pF
(Note 9)
10 mV
10
m
s
100 mV
4
t
PLH
Propagation Delay
(Low to High)
(Note 11)
f
e
10 kHz,
Cl
e
50p
(Note 9)
10 mV
6
m
s
100 mV
4
V
a e
2.7V,
f
e
10 kHz,
Cl
e
50 pF
(Note 9)
10 mV
7
m
s
100 mV
4
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2:
Human body model, 1.5 k
X
in series with 100 pF.
Note 3:
Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the
maximum allowed junction temperature of 150
§
C. Output currents in excess of
g
30 mA over long term may adversely affect reliability.
Note 4:
The maximum power dissipation is a function of T
J(max)
,
i
JA
, and T
A
. The maximum allowable power dissipation at any ambient temperature is
P
D
e
(T
J(max)
b
T
A
)/
i
JA
. All numbers apply for packages soldered directly into a PC board.
Note 5:
Typical values represent the most likely parametric norm.
Note 6:
All limits are guaranteed by testing or statistical analysis.
Note 7:
Limiting input pin current is only necessary for input voltages that exceed absolute maximum input voltage rating.
Note 8:
Do not short circuit output to V
a
, when V
a
is greater than 12V or reliability will be adversely affected.
Note 9:
C
L
includes the probe and jig capacitance.
Note 10:
Input offset voltage average drift is calculated by dividing the accelerated operating life V
OS
drift by the equivalent operational time. This represents worst
case input conditions and includes the first 30 days of drift.
Note 11:
Input step voltage for propagation delay measurement is 2V.
4
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