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參數(shù)資料
| 型號： | LM85 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | Hardware Monitor with Integrated Fan Control |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO24 |
| 封裝： | QSOP-24 |
| 文件頁數(shù)： | 23/26頁 |
| 文件大?。?/td> | 261K |
| 代理商： | LM85 |
Functional Description
(Continued)
TABLE 12. Hysteresis Settings
(Continued)
Setting
.
.
.
5h
.
.
.
Fh
HYSTERESIS
.
.
.
5C
.
.
.
15C
4.21 Register 6Fh: Test Register
Register
Address
6Fh
Read/
Write
R/W
Register
Name
Test Register
Bit 7
(MSB)
RES
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
XEN
Default
Value
00h
RES
RES
RES
RES
RES
RES
If the XEN bit is set high, the part will be placed into XOR tree test mode. Clearing the bit (writing a 0 to the XEN bit) brings the
part out of XOR tree test mode.
This register becomes Read Only when the Ready/Lock/Start/Override register Lock bit is set.Any further attempts to write to this
registers shall have no effect. After power up the default value is used whenever the Ready/Lock/Start/Override register Start bit
is cleared even though modifications to this register are possible.
4.22 Registers 70-7Fh: Vendor Specific Registers
These registers are for vendor specific features, including test registers. They will not default to a specific value on power up.
4.22.1 Register 74h: Tachometer Monitor Mode
Register
Address
74h
Read/
Write
R/W
Register
Name
Bit 7
(MSb)
RES
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSb)
T1-0
Default
Value
00h
Lock
Tach Monitor Mode
RES
T3/4-1
T3/4-0
T2-1
T2-0
T1-1
Each fan TACH input has 4 possible modes of operation. The modes for TACH3 and TACH4 share control bits T3/4-[1:0]; TACH2
is controlled by T2-[1:0]; TACH1 is controlled by T1-[1:0]. The result reported in all modes is based on 2 pulses per revolution. In
order for modes 2 and 3 to function properly it is required that the:
PWM1 output must control the fan that has it’s tachometer output connected to the TACH1 LM85 input.
PWM2 output must control the fan that has it’s tachometer output connected to the TACH2 LM85 input.
PWM3 output must control the fans that have their tachometer outputs connected to the TACH3 or TACH4 LM85 inputs.
Setting (Tn[1:0]) Mode Function
00
01
10
11
0
1
2
3
Traditional tach input monitor, false readings when under minimum detctable RPM
Traditional tach input monitor, FFFFh reading when under minimum detectable RPM
Most accurate readings, FFFFh reading when under minimum detectable RPM
Least effect on programmed PWM of Fan, FFFFh reading when under minimum detectable RPM
Mode 0:
This mode uses the conventional method for fan tachometer pulse detection and does not include any circuitry to
compensate for PWM Fan drive. This mode should be used when PWM drive is not used to power the fan. This mode may
report a false RPM reading when under minimum detectable RPM as shown in the follwing table.
Mode 1:
This mode uses the convertional method for fan tach detection. The reading will be FFFFh if it is below minimum
detectable RPM.
Mode 2:
This mode is optimized for accurate RPM readings and activates circuitry that extends the lower side of the RPM
reading as shown in the following table.
Mode 3:
This mode minimizes the effect on the RPM setting and activates circuitry that extends the lower side of the RPM
reading as shown in the following table.
PWM Frequency
10.01
15.02
Mode 0 and 1 Minimum RPM
841
1262
Mode 2 and 3 Minimum RPM
210
315
L
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